| /openbmc/qemu/target/sparc/ |
| H A D | monitor.c | 101 { "f0", offsetof(CPUSPARCState, fpr[0].l.upper) }, 102 { "f1", offsetof(CPUSPARCState, fpr[0].l.lower) }, 103 { "f2", offsetof(CPUSPARCState, fpr[1].l.upper) }, 104 { "f3", offsetof(CPUSPARCState, fpr[1].l.lower) }, 105 { "f4", offsetof(CPUSPARCState, fpr[2].l.upper) }, 106 { "f5", offsetof(CPUSPARCState, fpr[2].l.lower) }, 107 { "f6", offsetof(CPUSPARCState, fpr[3].l.upper) }, 108 { "f7", offsetof(CPUSPARCState, fpr[3].l.lower) }, 109 { "f8", offsetof(CPUSPARCState, fpr[4].l.upper) }, 110 { "f9", offsetof(CPUSPARCState, fpr[4].l.lower) }, [all …]
|
| H A D | gdbstub.c | 46 return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower); in sparc_cpu_gdb_read_register() 48 return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper); in sparc_cpu_gdb_read_register() 76 return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower); in sparc_cpu_gdb_read_register() 78 return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper); in sparc_cpu_gdb_read_register() 88 return gdb_get_reg64(mem_buf, env->fpr[(n - 64) + 16].ll); in sparc_cpu_gdb_read_register() 137 env->fpr[(n - 32) / 2].l.lower = tmp; in sparc_cpu_gdb_write_register() 139 env->fpr[(n - 32) / 2].l.upper = tmp; in sparc_cpu_gdb_write_register() 175 env->fpr[(n - 32) / 2].l.lower = tmp; in sparc_cpu_gdb_write_register() 177 env->fpr[(n - 32) / 2].l.upper = tmp; in sparc_cpu_gdb_write_register() 187 env->fpr[(n - 64) + 16].ll = tmp; in sparc_cpu_gdb_write_register()
|
| H A D | machine.c | 198 VMSTATE_CPUDOUBLE_ARRAY(env.fpr, SPARCCPU, TARGET_DPREGS),
|
| /openbmc/qemu/target/mips/tcg/ |
| H A D | msa_helper.c | 101 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_b() 102 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_b() 124 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_h() 125 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_h() 139 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_w() 140 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_w() 150 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nloc_d() 151 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nloc_d() 159 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); in helper_msa_nlzc_b() 160 wr_t *pws = &(env->active_fpu.fpr[ws].wr); in helper_msa_nlzc_b() [all …]
|
| H A D | msa_translate.c | 138 off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); in msa_translate_init() 141 off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); in msa_translate_init()
|
| /openbmc/qemu/linux-user/mips/ |
| H A D | target_prctl.h | 58 fpr_t *fpr = env->active_fpu.fpr; in do_prctl_set_fp_mode() local 61 fpr[i].w[!FP_ENDIAN_IDX] = fpr[i + 1].w[FP_ENDIAN_IDX]; in do_prctl_set_fp_mode() 63 fpr[i + 1].w[FP_ENDIAN_IDX] = fpr[i].w[!FP_ENDIAN_IDX]; in do_prctl_set_fp_mode()
|
| H A D | signal.c | 135 __put_user(regs->active_fpu.fpr[i].d, &sc->sc_fpregs[i]); in setup_sigcontext() 166 __get_user(regs->active_fpu.fpr[i].d, &sc->sc_fpregs[i]); in restore_sigcontext()
|
| /openbmc/qemu/tests/tcg/riscv64/ |
| H A D | test-fcvtmod.c | 77 double fpr; in do_fmv_d_x() local 78 __asm__ __volatile__("fmv.d.x %0, %1" : "=f"(fpr) : "r"(inp)); in do_fmv_d_x() 79 return fpr; in do_fmv_d_x() 85 double fpr = do_fmv_d_x(inp); in do_fcvt_w_d() local 89 __asm__ __volatile__("fcvt.w.d %0, %1, rtz" : "=r"(ret) : "f"(fpr)); in do_fcvt_w_d() 99 double fpr = do_fmv_d_x(inp); in do_fcvtmod_w_d() local 104 asm(".insn r 0x53, 0x1, 0x61, %0, %1, f8" : "=r"(ret) : "f"(fpr)); in do_fcvtmod_w_d() 308 double fpr = do_fmv_d_x(t->inp_lu); in run_fcvtmod_tests() local 309 printf("inp_lu: 0x%016lx == %lf\n", t->inp_lu, fpr); in run_fcvtmod_tests()
|
| /openbmc/qemu/linux-user/loongarch64/ |
| H A D | signal.c | 179 __put_user(env->fpr[i].vreg.UD(0), &lasx_ctx->regs[4 * i]); in setup_sigframe() 180 __put_user(env->fpr[i].vreg.UD(1), &lasx_ctx->regs[4 * i + 1]); in setup_sigframe() 181 __put_user(env->fpr[i].vreg.UD(2), &lasx_ctx->regs[4 * i + 2]); in setup_sigframe() 182 __put_user(env->fpr[i].vreg.UD(3), &lasx_ctx->regs[4 * i + 3]); in setup_sigframe() 196 __put_user(env->fpr[i].vreg.UD(0), &lsx_ctx->regs[2 * i]); in setup_sigframe() 197 __put_user(env->fpr[i].vreg.UD(1), &lsx_ctx->regs[2 * i + 1]); in setup_sigframe() 211 __put_user(env->fpr[i].vreg.UD(0), &fpu_ctx->regs[i]); in setup_sigframe() 295 __get_user(env->fpr[i].vreg.UD(0), &lasx_ctx->regs[4 * i]); in restore_sigframe() 296 __get_user(env->fpr[i].vreg.UD(1), &lasx_ctx->regs[4 * i + 1]); in restore_sigframe() 297 __get_user(env->fpr[i].vreg.UD(2), &lasx_ctx->regs[4 * i + 2]); in restore_sigframe() [all …]
|
| /openbmc/qemu/linux-user/riscv/ |
| H A D | signal.c | 37 uint64_t fpr[32]; member 41 QEMU_BUILD_BUG_ON(offsetof(struct target_sigcontext, fpr) != offsetof_freg0); 90 __put_user(env->fpr[i], &sc->fpr[i]); in setup_sigcontext() 157 __get_user(env->fpr[i], &sc->fpr[i]); in restore_sigcontext()
|
| /openbmc/qemu/target/mips/ |
| H A D | gdbstub.c | 42 env->active_fpu.fpr[n - 38].d); in mips_cpu_gdb_read_register() 45 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); in mips_cpu_gdb_read_register() 101 env->active_fpu.fpr[n - 38].d = tmp; in mips_cpu_gdb_write_register() 103 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp; in mips_cpu_gdb_write_register()
|
| H A D | cpu.h | 50 fpr_t fpr[32]; member
|
| /openbmc/qemu/target/loongarch/ |
| H A D | arch_dump.c | 56 uint64_t fpr[32]; member 103 note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]); in loongarch_write_elf64_fprpreg()
|
| /openbmc/qemu/target/ppc/ |
| H A D | arch_dump.c | 62 uint64_t fpr[32]; member 149 uint64_t *fpr = cpu_fpr_ptr(&cpu->env, i); in ppc_write_elf_fpregset() local 150 fpregset->fpr[i] = cpu_to_dump64(s, *fpr); in ppc_write_elf_fpregset()
|
| /openbmc/qemu/target/arm/ |
| H A D | arch_dump.c | 192 uint32_t fpr; in aarch64_write_elf64_sve() local 218 fpr = cpu_to_dump32(s, vfp_get_fpsr(env)); in aarch64_write_elf64_sve() 219 memcpy(&buf[sve_fpsr_offset(vq)], &fpr, sizeof(uint32_t)); in aarch64_write_elf64_sve() 221 fpr = cpu_to_dump32(s, vfp_get_fpcr(env)); in aarch64_write_elf64_sve() 222 memcpy(&buf[sve_fpcr_offset(vq)], &fpr, sizeof(uint32_t)); in aarch64_write_elf64_sve()
|
| /openbmc/qemu/configs/targets/ |
| H A D | s390x-softmmu.mak | 4 TARGET_XML_FILES= gdb-xml/s390x-core64.xml gdb-xml/s390-acr.xml gdb-xml/s390-fpr.xml gdb-xml/s390-v…
|
| H A D | s390x-linux-user.mak | 5 TARGET_XML_FILES= gdb-xml/s390x-core64.xml gdb-xml/s390-acr.xml gdb-xml/s390-fpr.xml gdb-xml/s390-v…
|
| /openbmc/qemu/bsd-user/arm/ |
| H A D | target_arch_reg.h | 40 target_fp_reg_t fpr[8]; member
|
| /openbmc/u-boot/arch/mips/include/asm/ |
| H A D | processor.h | 42 fpureg_t fpr[NUM_FPU_REGS]; member
|
| /openbmc/qemu/target/riscv/ |
| H A D | gdbstub.c | 118 return gdb_get_reg64(buf, env->fpr[n]); in riscv_gdb_get_fpu() 121 return gdb_get_reg32(buf, env->fpr[n]); in riscv_gdb_get_fpu() 133 env->fpr[n] = ldq_p(mem_buf); /* always 64-bit */ in riscv_gdb_set_fpu()
|
| /openbmc/qemu/linux-user/ppc/ |
| H A D | signal.c | 299 uint64_t *fpr = cpu_fpr_ptr(env, i); in save_user_regs() local 300 __put_user(*fpr, &frame->mc_fregs[i]); in save_user_regs() 407 uint64_t *fpr = cpu_fpr_ptr(env, i); in restore_user_regs() local 408 __get_user(*fpr, &frame->mc_fregs[i]); in restore_user_regs()
|
| /openbmc/qemu/target/mips/system/ |
| H A D | machine.c | 60 VMSTATE_FPR_ARRAY(fpr, CPUMIPSFPUContext, 32),
|
| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | processor.h | 1262 double fpr[32]; /* Complete floating point set */ member
|
| /openbmc/qemu/target/loongarch/tcg/ |
| H A D | vec_helper.c | 3083 VReg *Vd = &(env->fpr[vd].vreg); \ 3084 VReg *Vj = &(env->fpr[vj].vreg); \ 3085 VReg *Vk = &(env->fpr[vk].vreg); \ 3133 VReg *Vj = &(env->fpr[vj].vreg); \ 3151 VReg *Vj = &(env->fpr[vj].vreg); \ in SETANYEQZ()
|
| /openbmc/qemu/target/loongarch/tcg/insn_trans/ |
| H A D | trans_vec.c.inc | 4961 fpr[a->vj].vreg.B((a->imm))), 4978 fpr[a->vj].vreg.H((a->imm))), 4994 fpr[a->vj].vreg.W((a->imm))), 5010 fpr[a->vj].vreg.D((a->imm))),
|