/openbmc/qemu/target/hexagon/mmvec/ |
H A D | macros.h | 76 #define fGETNIBBLE(IDX, SRC) (fSXTN(4, 8, (SRC >> (4 * IDX)) & 0xF)) 77 #define fGETCRUMB(IDX, SRC) (fSXTN(2, 8, (SRC >> (2 * IDX)) & 0x3)) 314 fVSATN(WIDTH, fSXTN(WIDTH, 2 * WIDTH, U) + fSXTN(WIDTH, 2 * WIDTH, V)) 318 fVSATN(WIDTH, fSXTN(WIDTH, 2 * WIDTH, U) - fSXTN(WIDTH, 2 * WIDTH, V)) 329 ((fSXTN(WIDTH, 2 * WIDTH, U) + fSXTN(WIDTH, 2 * WIDTH, V)) >> 1) 331 ((fSXTN(WIDTH, 2 * WIDTH, U) + fSXTN(WIDTH, 2 * WIDTH, V) + 1) >> 1) 333 ((fSXTN(WIDTH, 2 * WIDTH, U) - fSXTN(WIDTH, 2 * WIDTH, V)) >> 1) 335 ((fSXTN(WIDTH, 2 * WIDTH, U) - fSXTN(WIDTH, 2 * WIDTH, V) + 1) >> 1) 337 fVSATN(WIDTH, ((fSXTN(WIDTH, 2 * WIDTH, U) - \ 338 fSXTN(WIDTH, 2 * WIDTH, V) + 1) >> 1))
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/openbmc/qemu/target/hexagon/imported/ |
H A D | shift.idef | 34 fHIDE(size4s_t) shamt=fSXTN(7,32,RtV);\ 41 fHIDE(size4s_t) shamt=fSXTN(7,32,RtV);\ 48 fHIDE(size4s_t) shamt=fSXTN(7,32,RtV);\ 55 fHIDE(size4s_t) shamt=fSXTN(7,32,RtV);\ 80 fHIDE(size4s_t) shamt=fSXTN(7,32,RtV);\ 87 fHIDE(size4s_t) shamt=fSXTN(7,32,RtV);\ 171 fHIDE(size4s_t) shamt = fSXTN(7,32,RtV); 322 RdV = fSXTN(width,32,(fCAST4_4u(RsV) >> offset)); 351 RddV = fSXTN(width,64,(fCAST8_8u(RssV) >> offset)); 380 fHIDE(int) offset=fSXTN(7,32,(fGETWORD(0,RttV))); [all …]
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H A D | alu.idef | 48 COND_ALU(A4_psxtb,"Rd32=sxtb(Rs32)","Conditionally sign-extend byte", RdV=fSXTN(8,32,RsV)) 50 COND_ALU(A4_psxth,"Rd32=sxth(Rs32)","Conditionally sign-extend halfword", RdV=fSXTN(16,32,RsV)) 93 #define HLSEM(A,B) RdV=fSXTN(16,32,(A+B)) 101 #define HLSEM(A,B) RdV=fSXTN(16,32,(A-B)) 146 { RddV=RttV+fSXTN(32,64,fGETWORD(0,RssV));}) 150 { RddV=RttV+fSXTN(32,64,fGETWORD(1,RssV));}) 258 "Sign extend byte", {RdV = fSXTN(8,32,RsV);}) 264 "Sign extend half", {RdV = fSXTN(16,32,RsV);}) 994 fSETWORD(i,RddV,(fSXTN(32,33,fGETWORD(i,RssV))+fSXTN(32,33,fGETWORD(i,RttV)))>>1); 1003 fSETWORD(i,RddV,(fSXTN(32,33,fGETWORD(i,RttV))-fSXTN(32,33,fGETWORD(i,RssV)))>>1); [all …]
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H A D | macros.def | 210 fSXTN, /* macro name */ 217 ((fSXTN(N,64,VAL) == (VAL)) ? (VAL) : fSATVALN(N,VAL)), 222 ((fSXTN(N,64,VAL) == (VAL)) ? (VAL) : fVSATVALN(N,VAL)), 346 (fSXTN(11,64,(((VAL) & 0xf0000000)>>21) | ((VAL>>17)&0x7f) )), /* behavior */ 786 (fSE32_64(A)*fSXTN(16,64,B)), /* behavior */ 1166 internal_fmafx(A,B,C,fSXTN(8,64,ADJ)),
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H A D | subinsns.idef | 45 Q6INSN(SA1_sxtb, "Rd16=sxtb(Rs16)", ATTRIBS(A_SUBINSN),"Sxtb", { RdV= fSXTN(8,32,Rs… 47 Q6INSN(SA1_sxth, "Rd16=sxth(Rs16)", ATTRIBS(A_SUBINSN),"Sxth", { RdV= fSXTN(16,32,R…
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/openbmc/qemu/target/hexagon/imported/mmvec/ |
H A D | macros.def | 72 ( fSXTN(4,8,(SRC >> (4*IDX)) & 0xF) ), 77 ( fSXTN(2,8,(SRC >> (2*IDX)) & 0x3) ), 755 fVSATN( WIDTH, fSXTN(WIDTH, 2*WIDTH, U) + fSXTN(WIDTH, 2*WIDTH, V)), 765 fVSATN( WIDTH, fSXTN(WIDTH, 2*WIDTH, U) - fSXTN(WIDTH, 2*WIDTH, V)), 790 ((fSXTN(WIDTH, 2*WIDTH, U) + fSXTN(WIDTH, 2*WIDTH, V))>>1), 795 ((fSXTN(WIDTH, 2*WIDTH, U) + fSXTN(WIDTH, 2*WIDTH, V)+1)>>1), 800 ((fSXTN(WIDTH, 2*WIDTH, U) - fSXTN(WIDTH, 2*WIDTH, V))>>1), 805 ((fSXTN(WIDTH, 2*WIDTH, U) - fSXTN(WIDTH, 2*WIDTH, V)+1)>>1), 810 fVSATN(WIDTH,((fSXTN(WIDTH, 2*WIDTH, U) - fSXTN(WIDTH, 2*WIDTH, V)+1)>>1)),
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H A D | ext.idef | 932 …etic shift right " DESC, VdV.TYPE[i] = fBIDIR_ASHIFTR(VuV.TYPE[i], fSXTN((LOGSIZE+1),SIZE,V… 933 …tic shift left " DESC, VdV.TYPE[i] = fBIDIR_ASHIFTL(VuV.TYPE[i], fSXTN((LOGSIZE+1),SIZE,V… 934 …hift right " DESC, VdV.u##TYPE[i] = fBIDIR_LSHIFTR(VuV.u##TYPE[i], fSXTN((LOGSIZE+1),SIZE,V…
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/openbmc/qemu/target/hexagon/idef-parser/ |
H A D | idef-parser.lex | 167 "fSXTN" { return SXT; }
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H A D | macros.h.inc | 30 #define fCAST2_8s(A) fSXTN(16, 64, A)
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/openbmc/qemu/target/hexagon/ |
H A D | macros.h | 272 #define fSXTN(N, M, VAL) (((N) != 0) ? sextract64((VAL), 0, (N)) : 0LL) macro 274 ((fSXTN(N, 64, VAL) == (VAL)) ? (VAL) : fSATVALN(N, VAL)) 276 ((fSXTN(N, 64, VAL) == (VAL)) ? (VAL) : fVSATVALN(N, VAL)) 405 #define fMPY3216SS(A, B) (fSE32_64(A) * fSXTN(16, 64, B))
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H A D | op_helper.c | 1200 tmp = internal_fmafx(RsV, RtV, RxV, fSXTN(8, 64, PuV), &env->fp_status); in HELPER()
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