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Searched refs:fSE16_32 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/hexagon/
H A Dmacros.h388 #define fSE16_32(A) ((int32_t)((int16_t)(A))) macro
398 #define fMPY16SS(A, B) fSE32_64(fSE16_32(A) * fSE16_32(B))
400 #define fMPY16SU(A, B) fSE32_64(fSE16_32(A) * fZE16_32(B))
/openbmc/qemu/target/hexagon/imported/
H A Dmacros.def682 fSE16_32, /* sign-extend 16 to 32 */
744 fSE32_64(fSE16_32(A)*fSE16_32(B)), /* behavior */
756 fSE32_64(fSE16_32(A)*fZE16_32(B)), /* behavior */
/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dext.idef387 …, "Unpack halves with sign-extend", fVARRAY_ELEMENT_ACCESS(VddV, w, i) = fSE16_32(VuV.h[i] ))
466 VddV.v[0].w[i] = fSE16_32(fGETHALF(0, VuV.w[i]));
467 VddV.v[1].w[i] = fSE16_32(fGETHALF(1, VuV.w[i])))
1291 …32.h):sat", "Vector absolute value of halfwords", VdV.h[i] = fVSATH(fABS(fSE16_32(VuV.h[i]))))