| /openbmc/qemu/target/hexagon/imported/ |
| H A D | mpy.idef | 1103 x0 = fGETUHALF(0, RsV);
1104 x1 = fGETUHALF(1, RsV);
1105 y0 = fGETUHALF(0, RtV);
1106 y1 = fGETUHALF(1, RtV);
1139 x0 = fGETUHALF(0, RsV);
1140 x1 = fGETUHALF(1, RsV);
1141 y0 = fGETUHALF(0, RtV);
1149 fSETHALF(0,RxxV,fGETUHALF(0,RxxV) ^ fGETUHALF(0,prod0));
1150 fSETHALF(1,RxxV,fGETUHALF(1,RxxV) ^ fGETUHALF(0,prod1));
1151 fSETHALF(2,RxxV,fGETUHALF(2,RxxV) ^ fGETUHALF(1,prod0));
[all …]
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| H A D | system.idef | 64 fGETUHALF(0,RttV), /*height*/
65 fGETUHALF(1,RttV), /*width*/
66 fGETUHALF(2,RttV), /*stride*/
67 fGETUHALF(3,RttV)); /*flags*/
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| H A D | alu.idef | 295 "Combine two halves into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(1,RsV);})
298 "Combine two halves into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(0,RsV);})
301 "Combine two halves into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(1,RsV);})
304 "Combine two halves into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(0,RsV);})
531 fSETHALF(i,RddV,fSATUN(16,fGETUHALF(i,RssV)+fGETUHALF(i,RttV)));
684 fSETHALF(i,RdV,fSATUN(16,fGETUHALF(i,RsV)+fGETUHALF(i,RtV)));
712 fSETHALF(i,RdV,fSATUN(16,fGETUHALF(i,RtV)-fGETUHALF(i,RsV)));
766 RdV += (fGETUHALF(i,RssV)+fGETUHALF(i,RttV));
815 fSETHALF(i,RddV,fSATUN(16,fGETUHALF(i,RttV)-fGETUHALF(i,RssV)));
967 fSETHALF(i,RddV,(fGETUHALF(i,RssV)+fGETUHALF(i,RttV))>>1);
[all …]
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| H A D | compare.idef | 446 fSETBIT(i*2, PdV, (fGETUHALF(i,RssV) > fGETUHALF(i,RttV)));
447 fSETBIT(i*2+1,PdV, (fGETUHALF(i,RssV) > fGETUHALF(i,RttV)));
477 fSETBIT(i*2, PdV, (fGETUHALF(i,RssV) > uiV));
478 fSETBIT(i*2+1,PdV, (fGETUHALF(i,RssV) > uiV));
497 PdV=f8BITSOF(fGETUHALF(0,RsV) > fGETUHALF(0,RtV));
518 PdV=f8BITSOF(fGETUHALF(0,RsV) > fCAST4u(uiV));
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| H A D | shift.idef | 534 fSETHALF(i,RddV, (fGETUHALF(i,RssV)>>uiV));
604 fSETHALF(i,RddV, fBIDIR_LSHIFTR(fGETUHALF(i,RssV),fSXTN(7,32,RtV),2_8));
614 fSETHALF(i,RddV, fBIDIR_LSHIFTL(fGETUHALF(i,RssV),fSXTN(7,32,RtV),2_8));
871 fSETWORD(i,RddV,fGETUHALF(i,RsV));
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| H A D | macros.def | 1408 DEF_MACRO(fGETUHALF,
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| /openbmc/qemu/target/hexagon/imported/mmvec/ |
| H A D | ext.idef | 869 VddV.v[0].uw[i] = fABS(fGETUHALF(0, VuuV.v[0].uw[i]) - fGETUHALF(0,RtV));
870 VddV.v[0].uw[i] += fABS(fGETUHALF(1, VuuV.v[0].uw[i]) - fGETUHALF(1,RtV));
871 VddV.v[1].uw[i] = fABS(fGETUHALF(1, VuuV.v[0].uw[i]) - fGETUHALF(0,RtV));
1259 VxxV.v[0].w[i] += fGETUHALF(0, VuV.w[i]) + fGETUHALF(0, VvV.w[i]);
1260 VxxV.v[1].w[i] += fGETUHALF(1, VuV.w[i]) + fGETUHALF(1, VvV.w[i]))
1592 VddV.v[0].uw[i] = fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV));
1593 VddV.v[1].uw[i] = fMPY16UU(fGETUHALF(1, VuV.uw[i]),fGETUHALF(1,RtV)))
1598 VxxV.v[0].uw[i] += fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV));
1599 VxxV.v[1].uw[i] += fMPY16UU(fGETUHALF(1, VuV.uw[i]),fGETUHALF(1,RtV)))
2336 VdV.uw[i] = fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV)))
[all …]
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| /openbmc/qemu/target/hexagon/idef-parser/ |
| H A D | idef-parser.lex | 233 "fGETUHALF" { yylval->extract.bit_width = 16;
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| /openbmc/qemu/target/hexagon/ |
| H A D | macros.h | 582 #define fGETUHALF(N, SRC) gen_get_half(HALF, N, SRC, false) macro
585 #define fGETUHALF(N, SRC) ((uint16_t)((SRC >> ((N) * 16)) & 0xffff)) macro
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