Searched refs:fCONSTLL (Results 1 – 6 of 6) sorted by relevance
| /openbmc/qemu/target/hexagon/idef-parser/ |
| H A D | idef-parser.lex | 186 "fCONSTLL" { yylval->cast.bit_width = 64;
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| /openbmc/qemu/target/hexagon/imported/ |
| H A D | macros.def | 71 …REG = ((REG) & ~(((fCONSTLL(1)<<(WIDTH))-1)<<(OFFSET))) | (((INVAL) & ((fCONSTLL(1)<<(WIDTH))-1)) … 102 INREG &= ~(((fCONSTLL(1)<<width)-1)<<offset); 104 INREG |= ((INVAL & ((fCONSTLL(1)<<width)-1)) << offset); 1520 DEF_MACRO(fCONSTLL,
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| H A D | shift.idef | 256 RxV &= ~(((fCONSTLL(1)<<width)-1)<<offset); 258 RxV |= ((RsV & ((fCONSTLL(1)<<width)-1)) << offset); 340 RxxV &= ~(((fCONSTLL(1)<<width)-1)<<offset); 342 RxxV |= ((RssV & ((fCONSTLL(1)<<width)-1)) << offset); 381 fHIDE(size8u_t) mask = ((fCONSTLL(1)<<width)-1); 416 fHIDE(size8u_t) mask = ((fCONSTLL(1)<<width)-1);
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| H A D | mpy.idef | 111 …mpy(Rs32,Rt32):rnd", ATTRIBS(),"Multiply 32x32",{RdV=(fMPY32SS(RsV,RtV)+fCONSTLL(0x80000000))>>32;… 1197 const128 = fCAST8S_16S(fCONSTLL(0x40000000));\
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| /openbmc/qemu/target/hexagon/ |
| H A D | macros.h | 631 #define fCONSTLL(A) A##LL macro
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| /openbmc/qemu/target/hexagon/imported/mmvec/ |
| H A D | ext.idef | 1045 fSETHALF(0, VdV.uw[i], fVSATH((VvV.w[i] + fCONSTLL(0x8000)) >> 16)); 1046 fSETHALF(1, VdV.uw[i], fVSATH((VuV.w[i] + fCONSTLL(0x8000)) >> 16))) 1050 fSETHALF(0, VdV.uw[i], fVSATUH((VvV.w[i] + fCONSTLL(0x8000)) >> 16)); 1051 fSETHALF(1, VdV.uw[i], fVSATUH((VuV.w[i] + fCONSTLL(0x8000)) >> 16))) 1055 fSETHALF(0, VdV.uw[i], fVSATUH((VvV.uw[i] + fCONSTLL(0x8000)) >> 16)); 1056 fSETHALF(1, VdV.uw[i], fVSATUH((VuV.uw[i] + fCONSTLL(0x8000)) >> 16)))
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