Searched refs:fBREV_4 (Results 1 – 4 of 4) sorted by relevance
/openbmc/qemu/target/hexagon/imported/ |
H A D | shift.idef | 1101 Q6INSN(S2_brev, "Rd32=brev(Rs32)", ATTRIBS(A_ARCHV2), "Bit Reverse",{RdV = fBREV_4(RsV);}) 1103 Q6INSN(S2_ct0, "Rd32=ct0(Rs32)", ATTRIBS(A_ARCHV2), "Count Trailing",{RdV = fCL1_4(~fBREV_4(RsV… 1104 Q6INSN(S2_ct1, "Rd32=ct1(Rs32)", ATTRIBS(A_ARCHV2), "Count Trailing",{RdV = fCL1_4(fBREV_4(RsV)…
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H A D | compare.idef | 586 SIZE = fMIN(6,fCL1_4(~fBREV_4(TLBLO)));
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H A D | macros.def | 1485 DEF_MACRO(fBREV_4,
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/openbmc/qemu/target/hexagon/ |
H A D | macros.h | 623 #define fBREV_4(VAL) revbit32(VAL) macro
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