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/openbmc/u-boot/board/compulab/cl-som-am57x/
H A Dspl.c164 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
165 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
172 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
173 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
174 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
175 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
182 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
183 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
184 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
185 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/openbmc/u-boot/board/ti/dra7xx/
H A Devm.c376 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
377 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
385 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
386 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
387 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
388 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
396 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
397 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
398 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
399 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/openbmc/u-boot/arch/arm/mach-mvebu/
H A Defuse.c68 static int do_prog_efuse(struct mvebu_hd_efuse *efuse, in do_prog_efuse() argument
73 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
74 val.dwords.d[1] = readl(&efuse->bits_63_32); in do_prog_efuse()
75 val.lock = readl(&efuse->bit64); in do_prog_efuse()
84 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
86 writel(val.dwords.d[1], &efuse->bits_63_32); in do_prog_efuse()
88 writel(val.lock, &efuse->bit64); in do_prog_efuse()
96 struct mvebu_hd_efuse *efuse; in prog_efuse() local
103 efuse = get_efuse_line(nr); in prog_efuse()
104 if (!efuse) in prog_efuse()
[all …]
/openbmc/u-boot/board/ti/am57xx/
H A Dboard.c324 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
325 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
333 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
334 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
335 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
336 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
344 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
345 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
346 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
347 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/openbmc/u-boot/doc/device-tree-bindings/exynos/
H A Dtmu.txt14 - samsung,efuse-min-value : SOC efuse min value (Constant 40)
15 - efuse-value should be more than this value.
16 - samsung,efuse-value : SOC actual efuse value (Literal value)
19 - samsung,efuse-max-value : SoC max efuse value (Constant 100)
20 - efuse-value should be less than this value.
39 samsung,efuse-min-value = <40>;
40 samsung,efuse-value = <55>;
41 samsung,efuse-max-value = <100>;
/openbmc/u-boot/drivers/misc/
H A Drockchip-efuse.c90 struct rockchip_efuse_regs *efuse = in rockchip_rk3399_efuse_read() local
108 &efuse->ctrl); in rockchip_rk3399_efuse_read()
111 setbits_le32(&efuse->ctrl, in rockchip_rk3399_efuse_read()
114 out_value = readl(&efuse->dout); in rockchip_rk3399_efuse_read()
115 clrbits_le32(&efuse->ctrl, RK3399_STROBE); in rockchip_rk3399_efuse_read()
123 writel(RK3399_PD | RK3399_CSB, &efuse->ctrl); in rockchip_rk3399_efuse_read()
/openbmc/qemu/hw/nvram/
H A Dmeson.build11 system_ss.add(when: 'CONFIG_XLNX_EFUSE_CRC', if_true: files('xlnx-efuse-crc.c'))
12 system_ss.add(when: 'CONFIG_XLNX_EFUSE', if_true: files('xlnx-efuse.c'))
14 'xlnx-versal-efuse-cache.c',
15 'xlnx-versal-efuse-ctrl.c'))
17 'xlnx-zynqmp-efuse.c'))
H A Dxlnx-versal-efuse-ctrl.c261 uint32_t check = xlnx_efuse_tbits_check(s->efuse); in efuse_status_tbits_sync()
275 if (!s->efuse || !s->efuse->init_tbits) { in efuse_anchor_bits_check()
279 for (page = 0; page < s->efuse->efuse_nr; page++) { in efuse_anchor_bits_check()
286 if (!xlnx_efuse_get_bit(s->efuse, bit)) { in efuse_anchor_bits_check()
287 xlnx_efuse_set_bit(s->efuse, bit); in efuse_anchor_bits_check()
291 if (!xlnx_efuse_get_bit(s->efuse, bit)) { in efuse_anchor_bits_check()
292 xlnx_efuse_set_bit(s->efuse, bit); in efuse_anchor_bits_check()
310 lk_bits = xlnx_efuse_get_row(s->efuse, EFUSE_KEY_CRC_LK_ROW) & lk_mask; in efuse_key_crc_check()
311 if (lk_bits == 0 && xlnx_efuse_k256_check(s->efuse, crc, first)) { in efuse_key_crc_check()
417 lock = xlnx_efuse_get_bit(s->efuse, lock); in efuse_pgm_locked()
[all …]
H A Dxlnx-versal-efuse-cache.c43 ret = xlnx_versal_efuse_read_row(s->efuse, w1, NULL); in efuse_cache_read()
46 ret |= xlnx_versal_efuse_read_row(s->efuse, w0, NULL); in efuse_cache_read()
88 XlnxVersalEFuseCache, efuse,
H A Dxlnx-zynqmp-efuse.c261 (xlnx_efuse_get_row((s->efuse), EFUSE_ ## field) \
265 ARRAY_FIELD_DP32((s)->regs, reg, field, xlnx_efuse_get_bit((s->efuse), \
274 unsigned int check = xlnx_efuse_tbits_check(s->efuse); in update_tbit_status()
304 u32[u32_off] |= xlnx_efuse_get_bit(s->efuse, fbit) << wbits; in cache_sync_u32()
336 s->regs[R_MISC_USER_CTRL] = xlnx_efuse_get_row(s->efuse, in zynqmp_efuse_sync_cache()
339 s->regs[R_PUF_CHASH] = xlnx_efuse_get_row(s->efuse, EFUSE_PUF_CHASH_START); in zynqmp_efuse_sync_cache()
340 s->regs[R_PUF_MISC] = xlnx_efuse_get_row(s->efuse, EFUSE_PUF_MISC_START); in zynqmp_efuse_sync_cache()
402 puf_prot = xlnx_efuse_get_bit(s->efuse, EFUSE_PUF_SYN_WRLK); in zynqmp_efuse_pgm_addr_postw()
430 if (!xlnx_efuse_set_bit(s->efuse, bit)) { in zynqmp_efuse_pgm_addr_postw()
536 s->regs[R_EFUSE_RD_DATA] = xlnx_efuse_get_row(s->efuse, val64) & col_mask; in zynqmp_efuse_rd_addr_postw()
[all …]
/openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/gpio/phosphor-gpio-monitor/
H A Dfan-board-efuse-fault@.service6 ExecStart=/usr/libexec/phosphor-gpio-monitor/fan-board-efuse-fault %i
7 SyslogIdentifier=fan-board-efuse-fault%i
/openbmc/qemu/include/hw/nvram/
H A Dxlnx-versal-efuse.h42 XlnxEFuse *efuse; member
56 XlnxEFuse *efuse; member
H A Dxlnx-zynqmp-efuse.h39 XlnxEFuse *efuse; member
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dclocks-common.c493 if (!v->efuse.reg[opp]) in optimize_vcore_voltage()
496 switch (v->efuse.reg_bits) { in optimize_vcore_voltage()
498 val = readw(v->efuse.reg[opp]); in optimize_vcore_voltage()
501 val = readl(v->efuse.reg[opp]); in optimize_vcore_voltage()
505 v->efuse.reg[opp], v->efuse.reg_bits); in optimize_vcore_voltage()
511 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]); in optimize_vcore_voltage()
516 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], in optimize_vcore_voltage()
600 abb_setup(vcores->mpu.efuse.reg[opp], in scale_vcores()
613 abb_setup(vcores->mm.efuse.reg[opp], in scale_vcores()
626 abb_setup(vcores->gpu.efuse.reg[opp], in scale_vcores()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Duniphier-pro5.dtsi385 efuse@100 {
386 compatible = "socionext,uniphier-efuse";
390 efuse@130 {
391 compatible = "socionext,uniphier-efuse";
395 efuse@200 {
396 compatible = "socionext,uniphier-efuse";
400 efuse@300 {
401 compatible = "socionext,uniphier-efuse";
405 efuse@400 {
406 compatible = "socionext,uniphier-efuse";
H A Dexynos5420-smdk5420.dts31 samsung,efuse-min-value = <40>;
32 samsung,efuse-value = <55>;
33 samsung,efuse-max-value = <100>;
H A Dkeystone-k2e-netcp.dtsi110 reg-names = "efuse";
189 efuse-mac = <1>;
201 efuse-mac = <0>;
H A Dkeystone-k2l-netcp.dtsi109 reg-names = "efuse";
172 efuse-mac = <1>;
184 efuse-mac = <0>;
H A Dkeystone-k2hk-netcp.dtsi126 reg-names = "efuse";
191 efuse-mac = <1>;
203 efuse-mac = <0>;
H A Dexynos5800-peach-pi.dts66 samsung,efuse-min-value = <40>;
67 samsung,efuse-value = <55>;
68 samsung,efuse-max-value = <100>;
H A Dkeystone-k2g-netcp.dtsi100 reg-names = "efuse";
148 efuse-mac = <1>;
H A Duniphier-ld4.dtsi331 efuse@100 {
332 compatible = "socionext,uniphier-efuse";
336 efuse@130 {
337 compatible = "socionext,uniphier-efuse";
/openbmc/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c369 .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
370 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
372 .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
373 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
375 .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
376 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
/openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/gpio/
H A Dphosphor-gpio-monitor_%.bbappend21 file://fan-board-efuse-fault \
22 file://fan-board-efuse-fault@.service \
58 fan-board-efuse-fault@.service \
85 install -m 0644 ${UNPACKDIR}/fan-board-efuse-fault@.service ${D}${systemd_system_unitdir}/
102 install -m 0755 ${UNPACKDIR}/fan-board-efuse-fault ${D}${libexecdir}/${PN}/
/openbmc/openbmc/meta-delta/meta-ahe50dc/recipes-kernel/linux/linux-aspeed/
H A Dahe50dc.cfg3 # efuse driver components

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