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Searched refs:eebacr (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/fsl/
H A Dmpc85xx_ddr_gen3.c360 setbits_be32(&ecm->eebacr, 0x10000000); in fsl_ddr_set_memctl_regs()
361 debug("Setting EEBACR[3] to 0x%08x\n", in_be32(&ecm->eebacr)); in fsl_ddr_set_memctl_regs()
519 clrbits_be32(&ecm->eebacr, 10000000); in fsl_ddr_set_memctl_regs()
520 debug("Clearing EEBACR[3] to 0x%08x\n", in_be32(&ecm->eebacr)); in fsl_ddr_set_memctl_regs()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h105 u32 eebacr; /* ECM CCB Addr Configuration */ member