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Searched refs:ecc_range_ctrl (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dsdram_ast2500.h119 u32 ecc_range_ctrl; /* offset 0x54 */ member
H A Dsdram_ast2600.h151 u32 ecc_range_ctrl; /* offset 0x54 */ member
/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_ast2500.c227 hw_size = readl(&regs->ecc_range_ctrl) & GENMASK(29, 20); in ast2500_sdrammc_update_size()
298 writel(((info->info.size >> 20) - 1) << 20, &regs->ecc_range_ctrl); in ast2500_sdrammc_ecc_enable()
H A Dsdram_ast2600.c789 writel(0x07FFFFFF, &regs->ecc_range_ctrl); in ast2600_sdrammc_common_init()
860 hw_size = readl(&regs->ecc_range_ctrl) & GENMASK(30, 20); in ast2600_sdrammc_update_size()
883 writel(((info->info.size >> 20) - 1) << 20, &regs->ecc_range_ctrl); in ast2600_sdrammc_ecc_enable()