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Searched refs:dsgcr (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.h120 u32 dsgcr; member
H A Dstm32mp1_ddr_regs.h152 u32 dsgcr; /* 0x2C DDR System General Configuration*/ member
H A Dstm32mp1_ddr.c128 DDRPHY_REG_REG(dsgcr),
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun6i.c148 writel(MCTL_DSGCR, &mctl_phy->dsgcr); in mctl_channel_init()
283 clrbits_le32(&mctl_phy1->dsgcr, MCTL_DSGCR_ENABLE); in mctl_com_init()
H A Ddram_sun9i.c630 clrbits_le32(&mctl_phy->dsgcr, (3 << 6)); in mctl_channel_init()
733 setbits_le32(&mctl_phy->dsgcr, 0xf << 24); /* unclear what this is... */ in mctl_channel_init()
H A Ddram_sun50i_h6.c547 clrsetbits_le32(&mctl_phy->dsgcr, BIT(0), 0x440060); in mctl_channel_init()
665 clrsetbits_le32(&mctl_phy->dsgcr, 0xc0, 0x40); in mctl_channel_init()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun9i.h104 u32 dsgcr; /* 0x84 DRAM system general config register */ member
H A Ddram_sun50i_h6.h168 u32 dsgcr; /* 0x090 */ member
H A Ddram_sun8i_a23.h179 u32 dsgcr; /* 0x40 dram system general config register */ member
H A Ddram_sun6i.h168 u32 dsgcr; /* 0x2c dram system general config register */ member
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dddr_rk3288.h176 u32 dsgcr; member
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3288.c334 clrsetbits_le32(&publ->dsgcr, in phy_cfg()