Searched refs:dramclk (Results 1 – 5 of 5) sorted by relevance
/openbmc/u-boot/board/freescale/m5282evb/ |
H A D | m5282evb.c | 20 u32 dramsize, i, dramclk; in dram_init() local 31 dramclk = gd->bus_clk / (CONFIG_SYS_HZ * CONFIG_SYS_HZ); in dram_init() 36 | MCFSDRAMC_DCR_RC((15 * dramclk)>>4)); in dram_init()
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/openbmc/u-boot/board/freescale/m5235evb/ |
H A D | m5235evb.c | 28 u32 dramsize, i, dramclk; in dram_init() local 53 dramclk = gd->bus_clk / (CONFIG_SYS_HZ * CONFIG_SYS_HZ); in dram_init() 58 SDRAMC_DCR_RC((15 * dramclk) >> 4)); in dram_init()
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/openbmc/u-boot/board/menlo/m53menlo/ |
H A D | m53menlo.c | 424 const u32 dramclk = 400; in m53_set_clock() local 438 ret = mxc_set_clock(ref_clk, dramclk, MXC_PERIPH_CLK); in m53_set_clock() 441 dramclk); in m53_set_clock() 444 ret = mxc_set_clock(ref_clk, dramclk, MXC_DDR_CLK); in m53_set_clock() 446 printf("CPU: Switch DDR clock to %dMHz failed\n", dramclk); in m53_set_clock()
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/openbmc/u-boot/board/inversepath/usbarmory/ |
H A D | usbarmory.c | 371 const uint32_t dramclk = 400; in set_clock() local 378 ret = mxc_set_clock(ref_clk, dramclk, MXC_PERIPH_CLK); in set_clock() 381 dramclk); in set_clock() 383 ret = mxc_set_clock(ref_clk, dramclk, MXC_DDR_CLK); in set_clock() 385 printf("CPU: Switch DDR clock to %dMHz failed\n", dramclk); in set_clock()
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | mvebu-core-clock.txt | 12 4 = dramclk (DDR clock)
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