| /openbmc/linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_srv.c | 152 static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) in dmub_srv_hw_setup() argument
154 struct dmub_srv_hw_funcs *funcs = &dmub->hw_funcs; in dmub_srv_hw_setup()
163 dmub->regs = &dmub_srv_dcn20_regs; in dmub_srv_hw_setup()
196 dmub->regs = &dmub_srv_dcn21_regs; in dmub_srv_hw_setup()
199 dmub->regs = &dmub_srv_dcn30_regs; in dmub_srv_hw_setup()
205 dmub->regs = &dmub_srv_dcn301_regs; in dmub_srv_hw_setup()
211 dmub->regs = &dmub_srv_dcn302_regs; in dmub_srv_hw_setup()
217 dmub->regs = &dmub_srv_dcn303_regs; in dmub_srv_hw_setup()
230 dmub->regs_dcn31 = &dmub_srv_dcn314_regs; in dmub_srv_hw_setup()
233 dmub->regs_dcn31 = &dmub_srv_dcn315_regs; in dmub_srv_hw_setup()
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| H A D | dmub_dcn20.c | 36 #define CTX dmub
37 #define REGS dmub->regs
60 static void dmub_dcn20_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn20_get_fb_base_offset() argument
66 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn20_get_fb_base_offset()
67 *fb_base = dmub->fb_base; in dmub_dcn20_get_fb_base_offset()
68 *fb_offset = dmub->fb_offset; in dmub_dcn20_get_fb_base_offset()
87 bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub) in dmub_dcn20_use_cached_inbox() argument
90 return !(dmub->fw_version >= DMUB_FW_VERSION(1, 0, 0) && in dmub_dcn20_use_cached_inbox()
91 dmub->fw_version <= DMUB_FW_VERSION(1, 10, 0)); in dmub_dcn20_use_cached_inbox()
94 void dmub_dcn20_reset(struct dmub_srv *dmub) in dmub_dcn20_reset() argument
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| H A D | dmub_dcn31.c | 35 #define CTX dmub
36 #define REGS dmub->regs_dcn31
56 static void dmub_dcn31_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn31_get_fb_base_offset() argument
62 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn31_get_fb_base_offset()
63 *fb_base = dmub->fb_base; in dmub_dcn31_get_fb_base_offset()
64 *fb_offset = dmub->fb_offset; in dmub_dcn31_get_fb_base_offset()
83 void dmub_dcn31_reset(struct dmub_srv *dmub) in dmub_dcn31_reset() argument
96 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn31_reset()
104 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn31_reset()
111 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn31_reset()
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| H A D | dmub_dcn32.c | 36 #define CTX dmub
37 #define REGS dmub->regs_dcn32
57 static void dmub_dcn32_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn32_get_fb_base_offset() argument
63 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn32_get_fb_base_offset()
64 *fb_base = dmub->fb_base; in dmub_dcn32_get_fb_base_offset()
65 *fb_offset = dmub->fb_offset; in dmub_dcn32_get_fb_base_offset()
84 void dmub_dcn32_reset(struct dmub_srv *dmub) in dmub_dcn32_reset() argument
97 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn32_reset()
109 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn32_reset()
114 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn32_reset()
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| H A D | dmub_dcn32.h | 188 void dmub_dcn32_reset(struct dmub_srv *dmub);
190 void dmub_dcn32_reset_release(struct dmub_srv *dmub);
192 void dmub_dcn32_backdoor_load(struct dmub_srv *dmub,
196 void dmub_dcn32_backdoor_load_zfb_mode(struct dmub_srv *dmub,
200 void dmub_dcn32_setup_windows(struct dmub_srv *dmub,
207 void dmub_dcn32_setup_mailbox(struct dmub_srv *dmub,
210 uint32_t dmub_dcn32_get_inbox1_wptr(struct dmub_srv *dmub);
212 uint32_t dmub_dcn32_get_inbox1_rptr(struct dmub_srv *dmub);
214 void dmub_dcn32_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
216 void dmub_dcn32_setup_out_mailbox(struct dmub_srv *dmub,
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| H A D | dmub_dcn31.h | 187 void dmub_dcn31_init(struct dmub_srv *dmub);
189 void dmub_dcn31_reset(struct dmub_srv *dmub);
191 void dmub_dcn31_reset_release(struct dmub_srv *dmub);
193 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub,
197 void dmub_dcn31_setup_windows(struct dmub_srv *dmub,
204 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub,
207 uint32_t dmub_dcn31_get_inbox1_wptr(struct dmub_srv *dmub);
209 uint32_t dmub_dcn31_get_inbox1_rptr(struct dmub_srv *dmub);
211 void dmub_dcn31_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
213 void dmub_dcn31_setup_out_mailbox(struct dmub_srv *dmub,
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| H A D | dmub_dcn20.h | 185 void dmub_dcn20_init(struct dmub_srv *dmub);
187 void dmub_dcn20_reset(struct dmub_srv *dmub);
189 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
202 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
205 uint32_t dmub_dcn20_get_inbox1_wptr(struct dmub_srv *dmub);
207 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub);
209 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
211 void dmub_dcn20_setup_out_mailbox(struct dmub_srv *dmub,
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| H A D | dmub_srv_stat.c | 46 enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub, in dmub_srv_stat_get_notification() argument
56 if (!dmub->hw_init) { in dmub_srv_stat_get_notification()
63 dmub->outbox1_rb.wrpt = dmub->hw_funcs.get_outbox1_wptr(dmub); in dmub_srv_stat_get_notification()
65 if (!dmub_rb_out_front(&dmub->outbox1_rb, &cmd)) { in dmub_srv_stat_get_notification()
122 dmub_rb_pop_front(&dmub->outbox1_rb); in dmub_srv_stat_get_notification()
123 dmub->hw_funcs.set_outbox1_rptr(dmub, dmub->outbox1_rb.rptr); in dmub_srv_stat_get_notification()
129 if (dmub_rb_empty(&dmub->outbox1_rb)) in dmub_srv_stat_get_notification()
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| H A D | dmub_dcn30.c | 36 #define CTX dmub
37 #define REGS dmub->regs
60 static void dmub_dcn30_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn30_get_fb_base_offset() argument
66 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn30_get_fb_base_offset()
67 *fb_base = dmub->fb_base; in dmub_dcn30_get_fb_base_offset()
68 *fb_offset = dmub->fb_offset; in dmub_dcn30_get_fb_base_offset()
87 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub, in dmub_dcn30_backdoor_load() argument
94 dmub_dcn30_get_fb_base_offset(dmub, &fb_base, &fb_offset); in dmub_dcn30_backdoor_load()
122 void dmub_dcn30_setup_windows(struct dmub_srv *dmub, in dmub_dcn30_setup_windows() argument
161 if (dmub_dcn20_use_cached_inbox(dmub)) { in dmub_dcn30_setup_windows()
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| H A D | dmub_dcn314.c | 41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
64 bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub) in dmub_dcn314_is_psrsu_supported() argument
66 return dmub->fw_version >= DMUB_FW_VERSION(8, 0, 16); in dmub_dcn314_is_psrsu_supported()
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| H A D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
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| H A D | dmub_dcn301.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| H A D | dmub_dcn21.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| H A D | dmub_dcn303.c | 17 #define CTX dmub
18 #define REGS dmub->regs
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| H A D | dmub_dcn302.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| H A D | dmub_dcn315.c | 41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
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| H A D | dmub_dcn316.c | 41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
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| /openbmc/linux/drivers/gpu/drm/amd/display/dmub/ |
| H A D | dmub_srv.h | 327 void (*init)(struct dmub_srv *dmub);
329 void (*reset)(struct dmub_srv *dmub);
331 void (*reset_release)(struct dmub_srv *dmub);
333 void (*backdoor_load)(struct dmub_srv *dmub,
337 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
340 void (*setup_windows)(struct dmub_srv *dmub,
347 void (*setup_mailbox)(struct dmub_srv *dmub,
350 uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
352 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
354 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dmub_psr.h | 39 bool (*psr_copy_settings)(struct dmub_psr *dmub, struct dc_link *link,
41 void (*psr_enable)(struct dmub_psr *dmub, bool enable, bool wait,
43 void (*psr_get_state)(struct dmub_psr *dmub, enum dc_psr_state *dc_psr_state,
45 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,
47 void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);
48 void (*psr_get_residency)(struct dmub_psr *dmub, uint32_t *residency,
50 void (*psr_set_sink_vtotal_in_psr_active)(struct dmub_psr *dmub,
52 void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst);
56 void dmub_psr_destroy(struct dmub_psr **dmub);
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| H A D | dmub_replay.c | 39 static void dmub_replay_get_state(struct dmub_replay *dmub, enum replay_state *state, uint8_t panel… in dmub_replay_get_state() argument
41 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_replay_get_state()
68 static void dmub_replay_enable(struct dmub_replay *dmub, bool enable, bool wait, uint8_t panel_inst) in dmub_replay_enable() argument
71 struct dc_context *dc = dmub->ctx; in dmub_replay_enable()
95 dmub_replay_get_state(dmub, &state, panel_inst); in dmub_replay_enable()
119 static void dmub_replay_set_power_opt(struct dmub_replay *dmub, unsigned int power_opt, uint8_t pan… in dmub_replay_set_power_opt() argument
122 struct dc_context *dc = dmub->ctx; in dmub_replay_set_power_opt()
137 static bool dmub_replay_copy_settings(struct dmub_replay *dmub, in dmub_replay_copy_settings() argument
143 struct dc_context *dc = dmub->ctx; in dmub_replay_copy_settings()
222 static void dmub_replay_set_coasting_vtotal(struct dmub_replay *dmub, in dmub_replay_set_coasting_vtotal() argument
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| H A D | dmub_psr.c | 105 static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state, uint8_t panel_inst) in dmub_psr_get_state() argument
107 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
142 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream, uint8_t pan… in dmub_psr_set_version() argument
145 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
181 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait, uint8_t panel_inst) in dmub_psr_enable() argument
184 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
209 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_enable()
232 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst) in dmub_psr_set_level() argument
236 struct dc_context *dc = dmub->ctx; in dmub_psr_set_level()
238 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_set_level()
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| H A D | dmub_replay.h | 40 void (*replay_get_state)(struct dmub_replay *dmub, enum replay_state *state,
42 void (*replay_enable)(struct dmub_replay *dmub, bool enable, bool wait,
44 bool (*replay_copy_settings)(struct dmub_replay *dmub, struct dc_link *link,
46 void (*replay_set_power_opt)(struct dmub_replay *dmub, unsigned int power_opt,
48 void (*replay_set_coasting_vtotal)(struct dmub_replay *dmub, uint16_t coasting_vtotal,
50 void (*replay_residency)(struct dmub_replay *dmub,
55 void dmub_replay_destroy(struct dmub_replay **dmub);
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| H A D | dmub_abm_lcd.c | 173 dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb); in dmub_abm_init_config()
176 memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)src, bytes); in dmub_abm_init_config()
182 …cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_ad… in dmub_abm_init_config()
233 dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb); in dmub_abm_save_restore()
236 memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)pData, bytes); in dmub_abm_save_restore()
242 …cmd.abm_save_restore.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_a… in dmub_abm_save_restore()
252 memcpy((void *)pData, dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, bytes); in dmub_abm_save_restore()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 40 struct dmub_srv *dmub) in dc_dmub_srv_construct() argument
42 dc_srv->dmub = dmub; in dc_dmub_srv_construct()
46 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create() argument
56 dc_dmub_srv_construct(dc_srv, dc, dmub); in dc_dmub_srv_create()
71 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_idle() local
75 status = dmub_srv_wait_for_idle(dmub, 100000); in dc_dmub_srv_wait_idle()
84 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_clear_inbox0_ack() local
88 status = dmub_srv_clear_inbox0_ack(dmub); in dc_dmub_srv_clear_inbox0_ack()
97 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_wait_for_inbox0_ack() local
101 status = dmub_srv_wait_for_inbox0_ack(dmub, 100000); in dc_dmub_srv_wait_for_inbox0_ack()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_stat.c | 55 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_notification() local
58 status = dmub_srv_stat_get_notification(dmub, notify); in dc_stat_get_dmub_notification()
84 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_dataout() local
87 status = dmub_srv_get_gpint_dataout(dmub, dataout); in dc_stat_get_dmub_dataout()
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