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Searched refs:dma (Results 1 – 25 of 304) sorted by relevance

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/openbmc/u-boot/drivers/dma/
H A Ddma-uclass.c26 static int dma_of_xlate_default(struct dma *dma, in dma_of_xlate_default() argument
29 debug("%s(dma=%p)\n", __func__, dma); in dma_of_xlate_default()
37 dma->id = args->args[0]; in dma_of_xlate_default()
39 dma->id = 0; in dma_of_xlate_default()
44 int dma_get_by_index(struct udevice *dev, int index, struct dma *dma) in dma_get_by_index() argument
51 debug("%s(dev=%p, index=%d, dma=%p)\n", __func__, dev, index, dma); in dma_get_by_index()
53 assert(dma); in dma_get_by_index()
54 dma->dev = NULL; in dma_get_by_index()
71 dma->dev = dev_dma; in dma_get_by_index()
76 ret = ops->of_xlate(dma, &args); in dma_get_by_index()
[all …]
H A Dsandbox-dma-test.c47 static int sandbox_dma_of_xlate(struct dma *dma, in sandbox_dma_of_xlate() argument
50 struct sandbox_dma_dev *ud = dev_get_priv(dma->dev); in sandbox_dma_of_xlate()
58 dma->id = args->args[0]; in sandbox_dma_of_xlate()
60 uc = &ud->channels[dma->id]; in sandbox_dma_of_xlate()
62 if (dma->id == 1) in sandbox_dma_of_xlate()
64 else if (dma->id == 2) in sandbox_dma_of_xlate()
68 debug("%s(dma id=%lu dir=%d)\n", __func__, dma->id, uc->dir); in sandbox_dma_of_xlate()
73 static int sandbox_dma_request(struct dma *dma) in sandbox_dma_request() argument
75 struct sandbox_dma_dev *ud = dev_get_priv(dma->dev); in sandbox_dma_request()
78 if (dma->id >= SANDBOX_DMA_CH_CNT) in sandbox_dma_request()
[all …]
H A Dlpc32xx_dma.c55 static struct dma_reg *dma = (struct dma_reg *)DMA_BASE; variable
71 writel(0, &dma->config); in lpc32xx_dma_get_channel()
72 writel(0, &dma->sync); in lpc32xx_dma_get_channel()
75 writel(0xFF, &dma->int_tc_clear); in lpc32xx_dma_get_channel()
76 writel(0xFF, &dma->raw_tc_stat); in lpc32xx_dma_get_channel()
77 writel(0xFF, &dma->int_err_clear); in lpc32xx_dma_get_channel()
78 writel(0xFF, &dma->raw_err_stat); in lpc32xx_dma_get_channel()
81 writel(DMAC_CTRL_ENABLE, &dma->config); in lpc32xx_dma_get_channel()
101 writel(BIT_MASK(channel), &dma->int_tc_clear); in lpc32xx_dma_start_xfer()
102 writel(BIT_MASK(channel), &dma->int_err_clear); in lpc32xx_dma_start_xfer()
[all …]
H A Dfsl_dma.c64 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dma_check() local
69 status = in_dma32(&dma->sr); in dma_check()
73 out_dma32(&dma->mr, in_dma32(&dma->mr) & ~FSL_DMA_MR_CS); in dma_check()
84 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dma_init() local
86 out_dma32(&dma->satr, FSL_DMA_SATR_SREAD_SNOOP); in dma_init()
87 out_dma32(&dma->datr, FSL_DMA_DATR_DWRITE_SNOOP); in dma_init()
88 out_dma32(&dma->sr, 0xffffffff); /* clear any errors */ in dma_init()
94 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dmacpy() local
100 out_dma32(&dma->dar, (u32) (dest & 0xFFFFFFFF)); in dmacpy()
101 out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); in dmacpy()
[all …]
H A Dbcm6348-iudma.c183 static int bcm6348_iudma_disable(struct dma *dma) in bcm6348_iudma_disable() argument
185 struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev); in bcm6348_iudma_disable()
186 struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id]; in bcm6348_iudma_disable()
189 bcm6348_iudma_chan_stop(priv, dma->id); in bcm6348_iudma_disable()
192 if (bcm6348_iudma_chan_is_rx(dma->id)) in bcm6348_iudma_disable()
194 DMA_FLOWC_ALLOC_REG(dma->id)); in bcm6348_iudma_disable()
199 if (bcm6348_iudma_chan_is_rx(dma->id)) in bcm6348_iudma_disable()
207 static int bcm6348_iudma_enable(struct dma *dma) in bcm6348_iudma_enable() argument
209 const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev); in bcm6348_iudma_enable()
210 struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id]; in bcm6348_iudma_enable()
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/openbmc/u-boot/include/
H A Ddma.h156 struct dma { struct
181 int dma_get_by_index(struct udevice *dev, int index, struct dma *dma);
198 int dma_get_by_name(struct udevice *dev, const char *name, struct dma *dma);
201 struct dma *dma) in dma_get_by_index() argument
207 struct dma *dma) in dma_get_by_name() argument
227 int dma_request(struct udevice *dev, struct dma *dma);
236 int dma_free(struct dma *dma);
245 int dma_enable(struct dma *dma);
254 int dma_disable(struct dma *dma);
268 int dma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size);
[all …]
H A Ddma-uclass.h44 int (*of_xlate)(struct dma *dma,
59 int (*request)(struct dma *dma);
68 int (*free)(struct dma *dma);
75 int (*enable)(struct dma *dma);
82 int (*disable)(struct dma *dma);
91 int (*prepare_rcv_buf)(struct dma *dma, void *dst, size_t size);
100 int (*receive)(struct dma *dma, void **dst, void *metadata);
110 int (*send)(struct dma *dma, void *src, size_t len, void *metadata);
/openbmc/u-boot/drivers/net/
H A Dbcm-sf2-eth-gmac.c34 static int gmac_disable_dma(struct eth_dma *dma, int dir);
35 static int gmac_enable_dma(struct eth_dma *dma, int dir);
94 static void dma_tx_dump(struct eth_dma *dma) in dma_tx_dump() argument
111 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_dump()
120 bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED); in dma_tx_dump()
126 static void dma_rx_dump(struct eth_dma *dma) in dma_rx_dump() argument
143 descp = (dma64dd_t *)(dma->rx_desc_aligned) + i; in dma_rx_dump()
151 bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED; in dma_rx_dump()
158 static int dma_tx_init(struct eth_dma *dma) in dma_tx_init() argument
168 memset((void *)(dma->tx_desc_aligned), 0, in dma_tx_init()
[all …]
H A Dbcm-sf2-eth.c35 struct eth_dma *dma = &(eth->dma); in bcm_sf2_eth_init() local
47 dma->disable_dma(dma, MAC_DMA_RX); in bcm_sf2_eth_init()
48 dma->disable_dma(dma, MAC_DMA_TX); in bcm_sf2_eth_init()
73 struct eth_dma *dma = &(((struct eth_info *)(dev->priv))->dma); in bcm_sf2_eth_send() local
81 rc = dma->tx_packet(dma, buf, length); in bcm_sf2_eth_send()
87 while (!(dma->check_tx_done(dma))) { in bcm_sf2_eth_send()
104 struct eth_dma *dma = &(((struct eth_info *)(dev->priv))->dma); in bcm_sf2_eth_receive() local
112 rcvlen = dma->check_rx_done(dma, buf); in bcm_sf2_eth_receive()
151 struct eth_dma *dma = &(eth->dma); in bcm_sf2_eth_open() local
159 dma->enable_dma(dma, MAC_DMA_RX); in bcm_sf2_eth_open()
[all …]
H A Dbcm-sf2-eth.h37 int (*tx_packet)(struct eth_dma *dma, void *packet, int length);
38 bool (*check_tx_done)(struct eth_dma *dma);
40 int (*check_rx_done)(struct eth_dma *dma, uint8_t *buf);
42 int (*enable_dma)(struct eth_dma *dma, int dir);
43 int (*disable_dma)(struct eth_dma *dma, int dir);
47 struct eth_dma dma; member
/openbmc/qemu/hw/dma/
H A Dsoc_dma.c89 struct dma_s *dma = (struct dma_s *) ch->dma; in soc_dma_ch_schedule() local
91 timer_mod(ch->timer, now + delay_bytes / dma->channel_freq); in soc_dma_ch_schedule()
99 ch->dma->setup_fn(ch); in soc_dma_ch_run()
108 static inline struct memmap_entry_s *soc_dma_lookup(struct dma_s *dma, in soc_dma_lookup() argument
114 lo = dma->memmap; in soc_dma_lookup()
115 hi = dma->memmap_size; in soc_dma_lookup()
129 struct dma_s *dma = (struct dma_s *) ch->dma; in soc_dma_ch_update_type() local
130 struct memmap_entry_s *entry = soc_dma_lookup(dma, ch->vaddr[port]); in soc_dma_ch_update_type()
133 while (entry < dma->memmap + dma->memmap_size && in soc_dma_ch_update_type()
171 ch->transfer_fn = ch->dma->transfer_fn; in soc_dma_ch_update()
[all …]
H A Domap_dma.c93 struct soc_dma_ch_s *dma; member
105 struct soc_dma_s *dma; member
204 ch->dma->type[i] = soc_dma_access_const; in omap_dma_channel_load()
207 ch->dma->type[i] = soc_dma_access_linear; in omap_dma_channel_load()
209 ch->dma->type[i] = soc_dma_access_other; in omap_dma_channel_load()
211 ch->dma->vaddr[i] = ch->addr[i]; in omap_dma_channel_load()
213 soc_dma_ch_update(ch->dma); in omap_dma_channel_load()
232 soc_dma_set_request(ch->dma, 1); in omap_dma_activate_channel()
252 if (ch->sync && ch->enable && (s->dma->drqbmp & (1ULL << ch->sync))) in omap_dma_deactivate_channel()
258 soc_dma_set_request(ch->dma, 0); in omap_dma_deactivate_channel()
[all …]
/openbmc/qemu/hw/display/
H A Domap_lcdc.c45 struct omap_dma_lcd_channel_s *dma; member
220 omap_lcd->dma->phys_framebuffer[omap_lcd->dma->current_frame], in omap_update_display()
271 if (omap_lcd->dma->current_frame == 0) in omap_update_display()
272 size = omap_lcd->dma->src_f1_bottom - omap_lcd->dma->src_f1_top; in omap_update_display()
274 size = omap_lcd->dma->src_f2_bottom - omap_lcd->dma->src_f2_top; in omap_update_display()
284 frame_base = omap_lcd->dma->phys_framebuffer[ in omap_update_display()
285 omap_lcd->dma->current_frame] + frame_offset; in omap_update_display()
286 omap_lcd->dma->condition |= 1 << omap_lcd->dma->current_frame; in omap_update_display()
287 if (omap_lcd->dma->interrupts & 1) in omap_update_display()
288 qemu_irq_raise(omap_lcd->dma->irq); in omap_update_display()
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/openbmc/qemu/hw/misc/
H A Dedu.c74 } dma; member
145 if (!(edu->dma.cmd & EDU_DMA_RUN)) { in edu_dma_timer()
149 if (EDU_DMA_DIR(edu->dma.cmd) == EDU_DMA_FROM_PCI) { in edu_dma_timer()
150 uint64_t dst = edu->dma.dst; in edu_dma_timer()
151 edu_check_range(dst, edu->dma.cnt, DMA_START, DMA_SIZE); in edu_dma_timer()
153 pci_dma_read(&edu->pdev, edu_clamp_addr(edu, edu->dma.src), in edu_dma_timer()
154 edu->dma_buf + dst, edu->dma.cnt); in edu_dma_timer()
156 uint64_t src = edu->dma.src; in edu_dma_timer()
157 edu_check_range(src, edu->dma.cnt, DMA_START, DMA_SIZE); in edu_dma_timer()
159 pci_dma_write(&edu->pdev, edu_clamp_addr(edu, edu->dma.dst), in edu_dma_timer()
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/openbmc/qemu/hw/ppc/
H A Dppc440_uc.c539 PPC4xxDmaState *dma = opaque; in dcr_read_dma() local
541 int addr = dcrn - dma->base; in dcr_read_dma()
548 val = dma->ch[chnl].cr; in dcr_read_dma()
551 val = dma->ch[chnl].ct; in dcr_read_dma()
554 val = dma->ch[chnl].sa >> 32; in dcr_read_dma()
557 val = dma->ch[chnl].sa; in dcr_read_dma()
560 val = dma->ch[chnl].da >> 32; in dcr_read_dma()
563 val = dma->ch[chnl].da; in dcr_read_dma()
566 val = dma->ch[chnl].sg >> 32; in dcr_read_dma()
569 val = dma->ch[chnl].sg; in dcr_read_dma()
[all …]
/openbmc/qemu/include/hw/arm/
H A Dsoc_dma.h45 struct soc_dma_s *dma; member
97 void soc_dma_port_add_fifo(struct soc_dma_s *dma, hwaddr virt_base,
99 void soc_dma_port_add_mem(struct soc_dma_s *dma, uint8_t *phys_base,
102 static inline void soc_dma_port_add_fifo_in(struct soc_dma_s *dma, in soc_dma_port_add_fifo_in() argument
105 return soc_dma_port_add_fifo(dma, virt_base, fn, opaque, 0); in soc_dma_port_add_fifo_in()
108 static inline void soc_dma_port_add_fifo_out(struct soc_dma_s *dma, in soc_dma_port_add_fifo_out() argument
111 return soc_dma_port_add_fifo(dma, virt_base, fn, opaque, 1); in soc_dma_port_add_fifo_out()
/openbmc/qemu/hw/riscv/
H A Dmicroblaze-v-generic.c57 DeviceState *dev, *dma, *eth0; in mb_v_generic_init() local
136 dma = qdev_new("xlnx.axi-dma"); in mb_v_generic_init()
140 object_property_add_child(qdev_get_machine(), "xilinx-dma", OBJECT(dma)); in mb_v_generic_init()
142 ds = object_property_get_link(OBJECT(dma), in mb_v_generic_init()
144 cs = object_property_get_link(OBJECT(dma), in mb_v_generic_init()
161 qdev_prop_set_uint32(dma, "freqhz", 100000000); in mb_v_generic_init()
162 object_property_set_link(OBJECT(dma), "axistream-connected", ds, in mb_v_generic_init()
164 object_property_set_link(OBJECT(dma), "axistream-control-connected", cs, in mb_v_generic_init()
166 sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); in mb_v_generic_init()
167 sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR); in mb_v_generic_init()
[all …]
/openbmc/pldm/oem/ibm/libpldmresponder/
H A Dfile_io_by_type.cpp37 dma::DMA xdmaInterface; in transferFileData()
38 while (length > dma::maxSize) in transferFileData()
40 auto rc = xdmaInterface.transferDataHost(fd, offset, dma::maxSize, in transferFileData()
46 offset += dma::maxSize; in transferFileData()
47 length -= dma::maxSize; in transferFileData()
48 address += dma::maxSize; in transferFileData()
58 dma::DMA xdmaInterface; in transferFileDataToSocket()
59 while (length > dma::maxSize) in transferFileDataToSocket()
62 xdmaInterface.transferHostDataToSocket(fd, dma::maxSize, address); in transferFileDataToSocket()
67 length -= dma::maxSize; in transferFileDataToSocket()
[all …]
/openbmc/qemu/hw/microblaze/
H A Dpetalogix_ml605_mmu.c74 DeviceState *dev, *dma, *eth0; in petalogix_ml605_init() local
139 dma = qdev_new("xlnx.axi-dma"); in petalogix_ml605_init()
143 object_property_add_child(qdev_get_machine(), "xilinx-dma", OBJECT(dma)); in petalogix_ml605_init()
145 ds = object_property_get_link(OBJECT(dma), in petalogix_ml605_init()
147 cs = object_property_get_link(OBJECT(dma), in petalogix_ml605_init()
164 qdev_prop_set_uint32(dma, "freqhz", 100 * 1000000); in petalogix_ml605_init()
165 object_property_set_link(OBJECT(dma), "axistream-connected", ds, in petalogix_ml605_init()
167 object_property_set_link(OBJECT(dma), "axistream-control-connected", cs, in petalogix_ml605_init()
169 sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); in petalogix_ml605_init()
170 sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR); in petalogix_ml605_init()
[all …]
/openbmc/qemu/hw/m68k/
H A Dnext-cube.c145 next_dma dma[10]; member
311 next_state->dma[NEXTDMA_ENRX].csr |= DMA_DEV2M; in next_dma_write()
316 next_state->dma[NEXTDMA_ENRX].csr |= DMA_ENABLE; in next_dma_write()
319 next_state->dma[NEXTDMA_ENRX].csr |= DMA_SUPDATE; in next_dma_write()
322 next_state->dma[NEXTDMA_ENRX].csr &= ~DMA_COMPLETE; in next_dma_write()
326 next_state->dma[NEXTDMA_ENRX].csr &= ~(DMA_COMPLETE | DMA_SUPDATE | in next_dma_write()
333 next_state->dma[NEXTDMA_ENRX].next_initbuf = val; in next_dma_write()
337 next_state->dma[NEXTDMA_ENRX].next = val; in next_dma_write()
341 next_state->dma[NEXTDMA_ENRX].limit = val; in next_dma_write()
346 next_state->dma[NEXTDMA_SCSI].csr |= DMA_DEV2M; in next_dma_write()
[all …]
/openbmc/qemu/hw/ide/
H A Dpci.c198 static void bmdma_start_dma(const IDEDMA *dma, IDEState *s, in bmdma_start_dma() argument
201 BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); in bmdma_start_dma()
221 static int32_t bmdma_prepare_buf(const IDEDMA *dma, int32_t limit) in bmdma_prepare_buf() argument
223 BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); in bmdma_prepare_buf()
273 static int bmdma_rw_buf(const IDEDMA *dma, bool is_write) in bmdma_rw_buf() argument
275 BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); in bmdma_rw_buf()
322 static void bmdma_set_inactive(const IDEDMA *dma, bool more) in bmdma_set_inactive() argument
324 BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); in bmdma_set_inactive()
334 static void bmdma_restart_dma(const IDEDMA *dma) in bmdma_restart_dma() argument
336 BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); in bmdma_restart_dma()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp.dtsi182 dma-names = "tx";
189 dma-names = "tx";
202 dma-names = "dma0";
208 dma-names = "dma0", "dma1", "dma2";
281 fpd_dma_chan1: dma@fd500000 {
283 compatible = "xlnx,zynqmp-dma-1.0";
293 fpd_dma_chan2: dma@fd510000 {
295 compatible = "xlnx,zynqmp-dma-1.0";
305 fpd_dma_chan3: dma@fd520000 {
307 compatible = "xlnx,zynqmp-dma-1.0";
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/openbmc/u-boot/drivers/usb/musb-new/
H A Dmusb_gadget.c84 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer() local
88 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer()
95 if (dma->is_compatible) in map_dma_buffer()
96 compatible = dma->is_compatible(musb_ep->dma, in map_dma_buffer()
102 if (request->request.dma == DMA_ADDR_INVALID) { in map_dma_buffer()
103 request->request.dma = dma_map_single( in map_dma_buffer()
113 request->request.dma, in map_dma_buffer()
129 if (request->request.dma == DMA_ADDR_INVALID) { in unmap_dma_buffer()
136 request->request.dma, in unmap_dma_buffer()
141 request->request.dma = DMA_ADDR_INVALID; in unmap_dma_buffer()
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dbrcm,bcm6338.dtsi7 #include <dt-bindings/dma/bcm6338-dma.h>
135 iudma: dma-controller@fffe2400 {
140 reg-names = "dma",
141 "dma-channels",
142 "dma-sram";
143 #dma-cells = <1>;
144 dma-channels = <6>;
157 dma-names = "rx",
H A Dbrcm,bcm6348.dtsi7 #include <dt-bindings/dma/bcm6348-dma.h>
171 dma-names = "rx",
184 dma-names = "rx",
190 iudma: dma-controller@fffe7000 {
195 reg-names = "dma",
196 "dma-channels",
197 "dma-sram";
198 #dma-cells = <1>;
199 dma-channels = <4>;

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