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/openbmc/u-boot/arch/x86/lib/
H A Ddiv64.c57 static u64 _64bit_divide(u64 dividend, u64 divider, u64 *rem_p) in _64bit_divide() argument
65 if (!divider) in _64bit_divide()
66 return 1 / (u32)divider; in _64bit_divide()
70 if (divider > MAX_32BIT_UINT) { in _64bit_divide()
73 *rem_p = divider; in _64bit_divide()
75 result = (u32)dividend / (u32)divider; in _64bit_divide()
77 *rem_p = (u32)dividend % (u32)divider; in _64bit_divide()
82 while (divider <= dividend) { in _64bit_divide()
83 u64 locald = divider; in _64bit_divide()
/openbmc/qemu/hw/core/
H A Dclock.c71 return muldiv64(clk->period, clk->multiplier, clk->divider); in clock_get_child_period()
143 bool clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider) in clock_set_mul_div() argument
145 assert(divider != 0); in clock_set_mul_div()
147 if (clk->multiplier == multiplier && clk->divider == divider) { in clock_set_mul_div()
152 clk->divider, divider); in clock_set_mul_div()
154 clk->divider = divider; in clock_set_mul_div()
183 clk->divider = 1; in clock_initfn()
H A Dclock-vmstate.c21 return clk->multiplier != 1 || clk->divider != 1; in muldiv_needed()
34 clk->divider = 1; in clock_pre_load()
46 VMSTATE_UINT32(divider, Clock),
/openbmc/u-boot/arch/arm/dts/
H A Ddm816x-clocks.dtsi99 compatible = "ti,divider-clock";
117 compatible = "ti,divider-clock";
125 compatible = "ti,divider-clock";
133 compatible = "ti,divider-clock";
141 compatible = "ti,divider-clock";
149 compatible = "ti,divider-clock";
157 compatible = "ti,divider-clock";
165 compatible = "ti,divider-clock";
173 compatible = "ti,divider-clock";
189 compatible = "ti,divider-clock";
H A Ddra7xx-clocks.dtsi214 compatible = "ti,divider-clock";
225 compatible = "ti,divider-clock";
234 compatible = "ti,divider-clock";
245 compatible = "ti,divider-clock";
277 compatible = "ti,divider-clock";
303 compatible = "ti,divider-clock";
347 compatible = "ti,divider-clock";
385 compatible = "ti,divider-clock";
423 compatible = "ti,divider-clock";
436 compatible = "ti,divider-clock";
[all …]
H A Dam43xx-clocks.dtsi213 compatible = "ti,divider-clock";
224 compatible = "ti,divider-clock";
235 compatible = "ti,divider-clock";
253 compatible = "ti,divider-clock";
271 compatible = "ti,divider-clock";
289 compatible = "ti,divider-clock";
308 compatible = "ti,divider-clock";
568 compatible = "ti,divider-clock";
591 compatible = "ti,divider-clock";
667 compatible = "ti,divider-clock";
[all …]
H A Dam33xx-clocks.dtsi181 compatible = "ti,divider-clock";
190 compatible = "ti,divider-clock";
199 compatible = "ti,divider-clock";
215 compatible = "ti,divider-clock";
231 compatible = "ti,divider-clock";
255 compatible = "ti,divider-clock";
272 compatible = "ti,divider-clock";
510 compatible = "ti,divider-clock";
525 compatible = "ti,divider-clock";
H A Domap3xxx-clocks.dtsi26 compatible = "ti,divider-clock";
205 compatible = "ti,divider-clock";
246 compatible = "ti,divider-clock";
293 compatible = "ti,divider-clock";
311 compatible = "ti,divider-clock";
336 compatible = "ti,divider-clock";
361 compatible = "ti,divider-clock";
420 compatible = "ti,divider-clock";
448 compatible = "ti,divider-clock";
476 compatible = "ti,divider-clock";
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dclock.c248 u64 divider = parent_rate * 2; in clk_get_divider() local
251 divider += rate - 1; in clk_get_divider()
252 do_div(divider, rate); in clk_get_divider()
254 if ((s64)divider - 2 < 0) in clk_get_divider()
257 if ((s64)divider - 2 >= max_divider) in clk_get_divider()
260 return divider - 2; in clk_get_divider()
300 int divider) in get_rate_from_divider() argument
305 do_div(rate, divider + 2); in get_rate_from_divider()
378 int divider = clk_get_divider(divider_bits, divided_parent, in find_best_divider() local
381 divider); in find_best_divider()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dspeed.c21 uint divider = 1 << (((sccr & SCCR_DFBRG11) >> 11) * 2); in get_clocks() local
39 gd->arch.brg_clk = gd->cpu_clk / divider; in get_clocks()
/openbmc/u-boot/arch/m68k/cpu/mcf532x/
H A Dspeed.c54 int divider; in get_sys_clock() local
58 divider = in_be16(&ccm->cdr) & CCM_CDR_LPDIV(0xF); in get_sys_clock()
60 return (FREF / (3 * (1 << divider))); in get_sys_clock()
63 return (FREF / (2 << divider)); in get_sys_clock()
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A DKconfig448 int "Platform clock divider"
454 This is the divider that is used to derive Platform clock from
459 int "DSPI clock divider"
463 This is the divider that is used to derive DSPI clock from Platform
467 int "DUART clock divider"
472 This is the divider that is used to derive DUART clock from Platform
476 int "I2C clock divider"
480 This is the divider that is used to derive I2C clock from Platform
484 int "IFC clock divider"
488 This is the divider that is used to derive IFC clock from Platform
[all …]
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c430 u32 divider; in stm32_get_HSI_divider() local
433 divider = readl(&regs->cr) & RCC_CR_HSIDIV_MASK; in stm32_get_HSI_divider()
434 divider = divider >> RCC_CR_HSIDIV_SHIFT; in stm32_get_HSI_divider()
436 return divider; in stm32_get_HSI_divider()
462 u32 divider; in stm32_get_rate() local
481 divider = 0; in stm32_get_rate()
483 divider = stm32_get_HSI_divider(regs); in stm32_get_rate()
486 divider, clk_get_rate(&clk)); in stm32_get_rate()
488 return clk_get_rate(&clk) >> divider; in stm32_get_rate()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dspl_mem_init.c147 const unsigned char divider = 33; in mxs_mem_init_clock() local
150 const unsigned char divider = 21; in mxs_mem_init_clock() local
160 writeb(CLKCTRL_FRAC_CLKGATE | (divider & CLKCTRL_FRAC_FRAC_MASK), in mxs_mem_init_clock()
/openbmc/u-boot/drivers/mmc/
H A Dmxcmmc.c423 unsigned int divider; in mxcmci_set_clk_rate() local
428 for (divider = 1; divider <= 0xF; divider++) { in mxcmci_set_clk_rate()
431 x = (clk_in / (divider + 1)); in mxcmci_set_clk_rate()
439 if (divider < 0x10) in mxcmci_set_clk_rate()
448 writel((prescaler << 4) | divider, &host->base->clk_rate); in mxcmci_set_clk_rate()
/openbmc/u-boot/drivers/i2c/
H A Dfsl_i2c.c85 unsigned short divider; member
122 ushort divider = min(i2c_clk / speed, (uint)USHRT_MAX); in set_i2c_bus_speed() local
144 speed = i2c_clk / divider; /* Fake something */ in set_i2c_bus_speed()
155 if (c_div > divider && c_div < est_div) { in set_i2c_bus_speed()
180 debug("divider: %d, est_div: %ld, DFSR: %d\n", divider, est_div, dfsr); in set_i2c_bus_speed()
189 if (fsl_i2c_speed_map[i].divider >= divider) { in set_i2c_bus_speed()
193 speed = i2c_clk / fsl_i2c_speed_map[i].divider; in set_i2c_bus_speed()
/openbmc/qemu/hw/timer/
H A Davr_timer16.c142 uint16_t divider = 0; in avr_timer16_clksrc_update() local
152 divider = 1; in avr_timer16_clksrc_update()
155 divider = 8; in avr_timer16_clksrc_update()
158 divider = 64; in avr_timer16_clksrc_update()
161 divider = 256; in avr_timer16_clksrc_update()
164 divider = 1024; in avr_timer16_clksrc_update()
169 if (divider) { in avr_timer16_clksrc_update()
170 t16->freq_hz = t16->cpu_freq_hz / divider; in avr_timer16_clksrc_update()
/openbmc/u-boot/drivers/serial/
H A Dserial_bcm283x_mu.c60 u32 divider; in bcm283x_mu_serial_setbrg() local
65 divider = plat->clock / (baudrate * 8); in bcm283x_mu_serial_setbrg()
68 writel(divider - 1, &regs->baud); in bcm283x_mu_serial_setbrg()
H A Dserial_pxa.c61 uint32_t divider = pxa_uart_get_baud_divider(baudrate); in pxa_setbrg_common() local
62 if (!divider) in pxa_setbrg_common()
74 writel(divider & 0xff, &uart_regs->dll); in pxa_setbrg_common()
75 writel(divider >> 8, &uart_regs->dlh); in pxa_setbrg_common()
H A Dserial_pl01x.c148 unsigned int divider; in pl01x_generic_setbrg() local
160 divider = clock / temp; in pl01x_generic_setbrg()
165 writel(divider, &regs->pl011_ibrd); in pl01x_generic_setbrg()
/openbmc/webui-vue/src/assets/styles/bmc/custom/
H A D_section-divider.scss1 .section-divider {
H A D_index.scss15 @import "./section-divider";
/openbmc/qemu/hw/char/
H A Dserial.c175 speed = (s->divider == 0) ? 3500 : (float) s->baudbase / s->divider; in serial_update_parameters()
343 s->divider = deposit32(s->divider, 8 * addr, 8, val); in serial_ioport_write()
365 s->divider = deposit32(s->divider, 8 * addr, 8, val); in serial_ioport_write()
479 ret = extract16(s->divider, 8 * addr, 8); in serial_ioport_read()
503 ret = extract16(s->divider, 8 * addr, 8); in serial_ioport_read()
830 VMSTATE_UINT16_V(divider, SerialState, 2),
870 s->divider = 0x0C; in serial_reset()
/openbmc/qemu/hw/misc/
H A Dstm32l4x5_rcc.c60 if (!bypass_source && mux->enabled && mux->divider) { in clock_mux_update()
61 freq_multiplier = mux->divider; in clock_mux_update()
73 mux->multiplier, mux->divider); in clock_mux_update()
139 VMSTATE_UINT32(divider, RccClockMuxState),
174 uint32_t multiplier, uint32_t divider) in clock_mux_set_factor() argument
176 if (mux->multiplier == multiplier && mux->divider == divider) { in clock_mux_set_factor()
180 mux->multiplier, multiplier, mux->divider, divider); in clock_mux_set_factor()
183 mux->divider = divider; in clock_mux_set_factor()
361 uint32_t divider) in pll_set_channel_divider() argument
363 if (pll->channel_divider[channel] == divider) { in pll_set_channel_divider()
[all …]
/openbmc/qemu/include/hw/
H A Dclock.h86 uint32_t divider; member
371 bool clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider);

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