Searched refs:dimm_params (Results 1 – 7 of 7) sorted by relevance
15 const dimm_params_t *dimm_params, in compute_cas_latency() argument33 if (dimm_params[i].n_ranks) in compute_cas_latency()34 tmp &= dimm_params[i].caslat_x; in compute_cas_latency()103 if (dimm_params[i].n_ranks) { in compute_cas_latency()136 if (!dimm_params[i].n_ranks) in compute_cas_latency()394 if (dimm_params[i].n_ranks) { in compute_lowest_common_dimm_parameters()403 if (dimm_params[i].n_ranks) { in compute_lowest_common_dimm_parameters()408 dimm_params[i].mpart); in compute_lowest_common_dimm_parameters()414 dimm_params[i].mpart); in compute_lowest_common_dimm_parameters()438 if (dimm_params[i].rcw[j] != dimm_params[0].rcw[j]) { in compute_lowest_common_dimm_parameters()[all …]
150 const dimm_params_t *dimm_params) in set_csn_config() argument267 if (dimm_params[0].n_ranks == 4) in avoid_odt_overlap()272 if ((dimm_params[0].n_ranks == 2) && in avoid_odt_overlap()273 (dimm_params[1].n_ranks == 2)) in avoid_odt_overlap()277 if (dimm_params[0].n_ranks == 4) in avoid_odt_overlap()281 if ((dimm_params[0].n_ranks != 0) && in avoid_odt_overlap()282 (dimm_params[2].n_ranks != 0)) in avoid_odt_overlap()297 const dimm_params_t *dimm_params) in set_timing_cfg_0() argument2126 if (dimm_params[i].n_ranks) in set_ddr_dq_mapping()2157 dimm_params[i].dq_mapping_ors; in set_ddr_dq_mapping()[all …]
260 if (!pinfo->dimm_params[i][j].n_ranks) in __step_assign_addresses()262 dw = pinfo->dimm_params[i][j].primary_sdram_width; in __step_assign_addresses()277 dw = pinfo->dimm_params[i][j].data_width; in __step_assign_addresses()278 if (pinfo->dimm_params[i][j].n_ranks in __step_assign_addresses()366 pinfo->dimm_params[i][j].base_address = in __step_assign_addresses()391 pinfo->dimm_params[i][j].base_address = in __step_assign_addresses()457 &(pinfo->dimm_params[i][j]); in fsl_ddr_compute()502 &(pinfo->dimm_params[i][j]); in fsl_ddr_compute()518 pinfo->dimm_params[i], in fsl_ddr_compute()537 pinfo->dimm_params[i], i); in fsl_ddr_compute()[all …]
1337 check_n_ranks = pinfo->dimm_params[first_ctrl][0].n_ranks; in check_interleaving_options()1338 check_rank_density = pinfo->dimm_params[first_ctrl][0].rank_density; in check_interleaving_options()1339 check_n_row_addr = pinfo->dimm_params[first_ctrl][0].n_row_addr; in check_interleaving_options()1340 check_n_col_addr = pinfo->dimm_params[first_ctrl][0].n_col_addr; in check_interleaving_options()1343 dimm = &pinfo->dimm_params[i][0]; in check_interleaving_options()
220 dimm_params_t *p = &(pinfo->dimm_params[ctrl_num][dimm_num]); in fsl_ddr_dimm_parameters_edit()1736 &(pinfo->dimm_params[i][j])); in fsl_ddr_printinfo()2051 memcpy(&(pinfo->dimm_params[dst_ctlr_num][dst_dimm_num]), in fsl_ddr_interactive()2052 &(pinfo->dimm_params[src_ctlr_num][src_dimm_num]), in fsl_ddr_interactive()2053 sizeof(pinfo->dimm_params[0][0])); in fsl_ddr_interactive()
211 rank_density = pinfo->dimm_params[0][0].rank_density >> in step_assign_addresses()248 pinfo->dimm_params[i][j].capacity; in step_assign_addresses()249 pinfo->dimm_params[i][j].base_address = in step_assign_addresses()
62 dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR]; member99 const dimm_params_t *dimm_params,