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Searched refs:ddrphycfg_parents (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c52 static const char * const ddrphycfg_parents[] = { variable
390 MUX_GATE_FLAGS(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
432 MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", ddrphycfg_parents,
H A Dclk-mt6795-topckgen.c101 static const char * const ddrphycfg_parents[] = { variable
456 TOP_MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt8173-topckgen.c49 static const char * const ddrphycfg_parents[] = { variable
535 ddrphycfg_parents, 0x0040, 16, 1, 23,
H A Dclk-mt8135.c280 static const char * const ddrphycfg_parents[] = { variable
383 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt8167.c328 static const char * const ddrphycfg_parents[] = { variable
559 MUX(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt7629.c81 static const char * const ddrphycfg_parents[] = { variable
466 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt6797.c103 static const char * const ddrphycfg_parents[] = { variable
329 MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt2701.c159 static const char * const ddrphycfg_parents[] = { variable
492 ddrphycfg_parents, 0x0040, 16, 1, 23, CLK_IS_CRITICAL),
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c167 static const int ddrphycfg_parents[] = { variable
366 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, ddrphycfg_parents, 0x40, 16, 1, 23),
H A Dclk-mt7623.c202 static const int ddrphycfg_parents[] = { variable
510 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, ddrphycfg_parents, 0x40, 16, 1, 23),