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Searched refs:ddr_ctl_regs (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c62 writel(ddrc_cfg, ddr_ctl_regs + DDRC_CFG); in ddr_cfg_init()
167 ddr_ctl_regs + DDRC_REMMAP(a / 4)); in remap_swap()
169 ddr_ctl_regs + DDRC_REMMAP(b / 4)); in remap_swap()
211 writel(0xf << 20, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
225 writel(0x0, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
231 writel(0x0, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
258 ddr_ctl_regs + DDRC_MMAP0); in sdram_init()
260 ddr_ctl_regs + DDRC_MMAP1); in sdram_init()
264 ddr_ctl_regs + DDRC_REFCNT); in sdram_init()
267 ddr_ctl_regs + DDRC_CTRL); in sdram_init()
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