Lines Matching refs:ddr_ctl_regs
43 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in ddr_cfg_init() local
62 writel(ddrc_cfg, ddr_ctl_regs + DDRC_CFG); in ddr_cfg_init()
67 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in ddr_phy_init() local
68 void __iomem *ddr_phy_regs = ddr_ctl_regs + DDR_PHY_OFFSET; in ddr_phy_init()
154 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in remap_swap() local
157 remmap[0] = readl(ddr_ctl_regs + DDRC_REMMAP(a / 4)); in remap_swap()
158 remmap[1] = readl(ddr_ctl_regs + DDRC_REMMAP(b / 4)); in remap_swap()
167 ddr_ctl_regs + DDRC_REMMAP(a / 4)); in remap_swap()
169 ddr_ctl_regs + DDRC_REMMAP(b / 4)); in remap_swap()
193 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in sdram_init() local
194 void __iomem *ddr_phy_regs = ddr_ctl_regs + DDR_PHY_OFFSET; in sdram_init()
211 writel(0xf << 20, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
225 writel(0x0, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
230 writel(DDRC_CTRL_CKE | DDRC_CTRL_ALH, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
231 writel(0x0, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
236 writel(ddr_config->timing[i], ddr_ctl_regs + DDRC_TIMING(i)); in sdram_init()
258 ddr_ctl_regs + DDRC_MMAP0); in sdram_init()
260 ddr_ctl_regs + DDRC_MMAP1); in sdram_init()
261 writel(DDRC_CTRL_CKE | DDRC_CTRL_ALH, ddr_ctl_regs + DDRC_CTRL); in sdram_init()
264 ddr_ctl_regs + DDRC_REFCNT); in sdram_init()
267 ddr_ctl_regs + DDRC_CTRL); in sdram_init()
269 clrbits_le32(ddr_ctl_regs + DDRC_ST, 0x40); in sdram_init()