Searched refs:dcn3_02_soc (Results 1 – 3 of 3) sorted by relevance
176 dcn3_02_soc.dram_channel_width_bytes * in dcn302_get_optimal_dcfclk_fclk_for_uclk()179 dcn3_02_soc.dram_channel_width_bytes * in dcn302_get_optimal_dcfclk_fclk_for_uclk()191 (dcn3_02_soc.return_bus_width_bytes * in dcn302_get_optimal_dcfclk_fclk_for_uclk()307 dcn3_02_soc.num_states = num_states; in dcn302_fpu_update_bw_bounding_box()309 dcn3_02_soc.clock_limits[i].state = i; in dcn302_fpu_update_bw_bounding_box()320 dcn3_02_soc.clock_limits[i].dtbclk_mhz = dcn3_02_soc.clock_limits[i-1].dtbclk_mhz; in dcn302_fpu_update_bw_bounding_box()324 dcn3_02_soc.clock_limits[i].socclk_mhz = dcn3_02_soc.clock_limits[i-1].socclk_mhz; in dcn302_fpu_update_bw_bounding_box()329 dcn3_02_soc.clock_limits[i].phyclk_d18_mhz = dcn3_02_soc.clock_limits[0].phyclk_d18_mhz; in dcn302_fpu_update_bw_bounding_box()330 dcn3_02_soc.clock_limits[i].dscclk_mhz = dcn3_02_soc.clock_limits[0].dscclk_mhz; in dcn302_fpu_update_bw_bounding_box()349 dcn3_02_soc.sr_enter_plus_exit_time_us = in dcn302_fpu_init_soc_bounding_box()[all …]
32 extern struct _vcs_dpi_soc_bounding_box_st dcn3_02_soc;
953 struct _vcs_dpi_soc_bounding_box_st *loaded_bb = &dcn3_02_soc; in init_soc_bounding_box()1349 dml_init_instance(&dc->dml, &dcn3_02_soc, &dcn3_02_ip, DML_PROJECT_DCN30); in dcn302_resource_construct()