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Searched refs:dc_isar_feature (Results 1 – 9 of 9) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate-vfp.c182 if (dc_isar_feature(aa32_mve, s)) { in gen_update_fp_context()
197 s->mve_no_pred = dc_isar_feature(aa32_mve, s); in gen_update_fp_context()
311 if (!dc_isar_feature(aa32_vsel, s)) { in trans_VSEL()
315 if (sz == 3 && !dc_isar_feature(aa32_fpdp_v2, s)) { in trans_VSEL()
319 if (sz == 1 && !dc_isar_feature(aa32_fp16_arith, s)) { in trans_VSEL()
324 if (sz == 3 && !dc_isar_feature(aa32_simd_r32, s) && in trans_VSEL()
437 if (!dc_isar_feature(aa32_vrint, s)) { in trans_VRINT()
441 if (sz == 3 && !dc_isar_feature(aa32_fpdp_v2, s)) { in trans_VRINT()
445 if (sz == 1 && !dc_isar_feature(aa32_fp16_arith, s)) { in trans_VRINT()
450 if (sz == 3 && !dc_isar_feature(aa32_simd_r32, s) && in trans_VRINT()
[all …]
H A Dtranslate-neon.c125 if (((vd | vn | vm) & 0x10) && !dc_isar_feature(aa32_simd_r32, s)) { in do_neon_ddda()
155 if (((vd | vn | vm) & 0x10) && !dc_isar_feature(aa32_simd_r32, s)) { in do_neon_ddda_env()
187 if (((vd | vn | vm) & 0x10) && !dc_isar_feature(aa32_simd_r32, s)) { in do_neon_ddda_fpst()
217 if (!dc_isar_feature(aa32_vcma, s)) { in trans_VCMLA()
221 if (!dc_isar_feature(aa32_fp16_arith, s)) { in trans_VCMLA()
237 if (!dc_isar_feature(aa32_vcma, s) in trans_VCADD()
238 || (a->size == MO_16 && !dc_isar_feature(aa32_fp16_arith, s))) { in trans_VCADD()
243 if (!dc_isar_feature(aa32_simd_r32, s) && in trans_VCADD()
270 if (!dc_isar_feature(aa32_dp, s)) { in trans_VSDOT()
279 if (!dc_isar_feature(aa32_dp, s)) { in trans_VUDOT()
[all …]
H A Dtranslate-m-nocp.c62 if (dc_isar_feature(aa32_simd_r32, s)) { in trans_VLLDM_VLSTM()
81 if (!dc_isar_feature(aa32_vfp, s)) { in trans_VLLDM_VLSTM()
109 if (!dc_isar_feature(aa32_m_sec_state, s)) { in trans_VSCCLRM()
122 if (!dc_isar_feature(aa32_vfp_simd, s)) { in trans_VSCCLRM()
164 if (topreg > 31 && !dc_isar_feature(aa32_simd_r32, s)) { in trans_VSCCLRM()
186 if (dc_isar_feature(aa32_mve, s)) { in trans_VSCCLRM()
233 if (!dc_isar_feature(aa32_fpsp_v2, s) && !dc_isar_feature(aa32_mve, s)) { in fp_sysreg_checks()
257 if (!dc_isar_feature(aa32_mve, s)) { in fp_sysreg_checks()
332 if (dc_isar_feature(aa32_mve, s)) { in gen_M_fp_sysreg_write()
446 if (regno == ARM_VFP_FPSCR_NZCVQC && !dc_isar_feature(aa32_mve, s)) { in gen_M_fp_sysreg_read()
H A Dtranslate-mve.c151 if (!dc_isar_feature(aa32_mve, s) || in do_ldst()
222 if (!dc_isar_feature(aa32_mve, s) || in DO_VLDST_WIDE_NARROW()
316 if (!dc_isar_feature(aa32_mve, s) || in do_ldst_sg_imm()
385 if (!dc_isar_feature(aa32_mve, s) || in do_vldst_il()
476 if (!dc_isar_feature(aa32_mve, s) || in trans_VDUP()
505 if (!dc_isar_feature(aa32_mve, s) || in do_1op_vec()
575 if (!dc_isar_feature(aa32_mve_fp, s)) { \
603 if (!dc_isar_feature(aa32_mve_fp, s) ||
638 if (!dc_isar_feature(aa32_mve_fp, s)) { \ in DO_VCVT_RMODE()
668 if (!dc_isar_feature(aa32_mve_fp, s)) { \
[all …]
H A Dtranslate-sve.c565 if (a->esz < 0 || !dc_isar_feature(aa64_sve2, s)) { in TRANS_FEAT()
1139 if (!dc_isar_feature(aa64_sve, s)) { in trans_ADDVL()
1152 if (!dc_isar_feature(aa64_sme, s)) { in trans_ADDSVL()
1165 if (!dc_isar_feature(aa64_sve, s)) { in trans_ADDPL()
1178 if (!dc_isar_feature(aa64_sme, s)) { in trans_ADDSPL()
1191 if (!dc_isar_feature(aa64_sve, s)) { in trans_RDVL()
1203 if (!dc_isar_feature(aa64_sme, s)) { in trans_RDSVL()
1322 if (!dc_isar_feature(aa64_sve, s)) { in trans_AND_pppp()
1360 if (!dc_isar_feature(aa64_sve, s)) { in trans_BIC_pppp()
1391 if (!dc_isar_feature(aa64_sve, s)) { in trans_EOR_pppp()
[all …]
H A Dtranslate-a64.c394 if (dc_isar_feature(aa64_lse2, s)) { in check_atomic_align()
415 if (!dc_isar_feature(aa64_lse2, s)) { in check_ordered_align()
1249 if (s->pstate_sm || !dc_isar_feature(aa64_sve, s)) { in sve_access_check()
1252 assert(dc_isar_feature(aa64_sme, s)); in sve_access_check()
1505 if (a->c && !dc_isar_feature(aa64_hbc, s)) { in trans_B_cond()
1525 if (dc_isar_feature(aa64_bti, s)) { in set_btype_for_br()
1540 if (dc_isar_feature(aa64_bti, s)) { in set_btype_for_blr()
1603 if (!dc_isar_feature(aa64_pauth, s)) { in trans_BRAZ()
1618 if (!dc_isar_feature(aa64_pauth, s)) { in trans_BLRAZ()
1650 if (!dc_isar_feature(aa64_pauth, s)) { in trans_BRA()
[all …]
H A Dtranslate-sme.c123 if (!dc_isar_feature(aa64_sme, s)) { in trans_ZERO()
155 if (!dc_isar_feature(aa64_sme, s)) { in trans_MOVA()
221 if (!dc_isar_feature(aa64_sme, s)) { in trans_LDST1()
H A Dtranslate.c39 #define ENABLE_ARCH_5J dc_isar_feature(aa32_jazelle, s)
2805 dc_isar_feature(aa64_sel2, s)) { in msr_banked_access_decode()
3022 && dc_isar_feature(aa64_tidcp1, s)) { in do_coproc_insn()
3992 if (!dc_isar_feature(aa32_mve, s) || in do_mve_shl_ri()
4077 if (!dc_isar_feature(aa32_mve, s) || in do_mve_shl_rr()
4138 if (!dc_isar_feature(aa32_mve, s) || in do_mve_sh_ri()
4190 if (!dc_isar_feature(aa32_mve, s) || in do_mve_sh_rr()
4527 if (!arm_dc_feature(s, ARM_FEATURE_M) && dc_isar_feature(aa32_ras, s)) { in trans_ESB()
4568 if (!dc_isar_feature(aa32_crc32, s)) { in op_crc32()
6255 ? !dc_isar_feature(aa32_thumb_div, s) in op_div()
[all …]
H A Dtranslate.h588 #define dc_isar_feature(name, ctx) \ macro
837 { return dc_isar_feature(FEAT, s) && FUNC(s, __VA_ARGS__); }
843 return dc_isar_feature(FEAT, s) && FUNC(s, __VA_ARGS__); \