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Searched refs:ctz32 (Results 1 – 25 of 91) sorted by relevance

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/openbmc/qemu/include/hw/pci/
H A Dpcie_regs.h32 #define PCI_EXP_FLAGS_IRQ_SHIFT ctz32(PCI_EXP_FLAGS_IRQ)
33 #define PCI_EXP_FLAGS_TYPE_SHIFT ctz32(PCI_EXP_FLAGS_TYPE)
59 #define PCI_EXP_LNK_MLW_SHIFT ctz32(PCI_EXP_LNKCAP_MLW)
64 #define PCI_EXP_LNKCAP_ASPMS_SHIFT ctz32(PCI_EXP_LNKCAP_ASPMS)
67 #define PCI_EXP_LNKCAP_PN_SHIFT ctz32(PCI_EXP_LNKCAP_PN)
69 #define PCI_EXP_SLTCAP_PSN_SHIFT ctz32(PCI_EXP_SLTCAP_PSN)
120 #define PCI_ERR_ROOT_IRQ_SHIFT ctz32(PCI_ERR_ROOT_IRQ)
H A Dpci.h613 rval = reg << ctz32(mask); in pci_set_byte_by_mask()
624 rval = reg << ctz32(mask); in pci_set_word_by_mask()
635 rval = reg << ctz32(mask); in pci_set_long_by_mask()
646 rval = reg << ctz32(mask); in pci_set_quad_by_mask()
/openbmc/qemu/hw/pci/
H A Dmsi.c90 ((flags & PCI_MSI_FLAGS_QSIZE) >> ctz32(PCI_MSI_FLAGS_QSIZE)); in msi_nr_vectors()
216 vectors_order = ctz32(nr_vectors); in msi_init()
218 flags = vectors_order << ctz32(PCI_MSI_FLAGS_QMASK); in msi_init()
452 (flags & PCI_MSI_FLAGS_QSIZE) >> ctz32(PCI_MSI_FLAGS_QSIZE); in msi_write_config()
454 (flags & PCI_MSI_FLAGS_QMASK) >> ctz32(PCI_MSI_FLAGS_QMASK); in msi_write_config()
457 flags |= log_max_vecs << ctz32(PCI_MSI_FLAGS_QSIZE); in msi_write_config()
H A Dslotid_cap.c8 #define SLOTID_NSLOTS_SHIFT ctz32(PCI_SID_ESR_NSLOTS)
H A Dshpc.c65 ctz32(SHPC_SLOT_STATE_MASK)
74 ctz32(SHPC_SLOT_PWR_LED_MASK)
77 ctz32(SHPC_SLOT_ATTN_LED_MASK)
158 uint16_t result = (pci_get_word(status) & msk) >> ctz32(msk); in shpc_get_status()
169 pci_word_test_and_set_mask(status, value << ctz32(msk)); in shpc_set_status()
/openbmc/qemu/hw/intc/
H A Dloongarch_extioi.c116 irq = ctz32(val); in extioi_enable_irq()
124 irq = ctz32(val); in extioi_enable_irq()
144 cpu = ctz32(cpu); in extioi_update_sw_coremap()
178 ipnum = ctz32(ipnum); in extioi_update_sw_ipmap()
236 irq = ctz32(old_data); in extioi_writew()
240 irq = ctz32(old_data); in extioi_writew()
H A Dallwinner-a10-pic.c38 zeroes = ctz32(s->irq_pending[i] & ~s->mask[i]); in aw_a10_pic_update()
/openbmc/qemu/target/openrisc/
H A Dcpu.c200 | (DMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in or1200_initfn()
202 | (IMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in or1200_initfn()
219 | (DMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in openrisc_any_initfn()
221 | (IMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in openrisc_any_initfn()
/openbmc/qemu/hw/block/
H A Dpflash_cfi01.c155 boff = offset >> (ctz32(pfl->bank_width) + in pflash_cfi_query()
156 ctz32(pfl->max_device_width) - ctz32(pfl->device_width)); in pflash_cfi_query()
215 boff = offset >> (ctz32(pfl->bank_width) + in pflash_devid_query()
216 ctz32(pfl->max_device_width) - ctz32(pfl->device_width)); in pflash_devid_query()
757 pfl->cfi_table[0x27] = ctz32(device_len); /* + 1; */ in pflash_cfi01_fill_cfi_table()
/openbmc/qemu/hw/gpio/
H A Domap_gpio.c131 while ((ln = ctz32(diff)) != 32) { in omap_gpio_write()
143 while ((ln = ctz32(diff)) != 32) { in omap_gpio_write()
H A Dpcf8574.c90 line = ctz32(diff); in pcf8574_tx()
H A Dzaurus.c71 bit = ctz32(diff); in scoop_gpio_handler_update()
/openbmc/qemu/util/
H A Dcacheflush.c216 qemu_icache_linesize_log = ctz32(isize); in init_cache_info()
218 qemu_dcache_linesize_log = ctz32(dsize); in init_cache_info()
H A Dcpuinfo-riscv.c145 riscv_lg2_vlenb = ctz32(vlenb); in cpuinfo_init()
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h200 return (be32_to_cpu(word) & mask) >> ctz32(mask); in xive_get_field32()
207 (be32_to_cpu(word) & ~mask) | ((value << ctz32(mask)) & mask); in xive_set_field32()
/openbmc/qemu/target/xtensa/
H A Dwin_helper.c118 uint32_t n = ctz32(windowstart) + 1; in HELPER()
127 switch (ctz32(windowstart >> n)) { in HELPER()
/openbmc/qemu/include/qemu/
H A Dhost-utils.h236 static inline int ctz32(uint32_t val) in ctz32() function
249 return ctz32(~val); in cto32()
698 # define ctzl ctz32
/openbmc/qemu/include/exec/
H A Dmemop.h164 return (MemOp)ctz32(size); in size_memop()
/openbmc/qemu/accel/tcg/
H A Dtcg-runtime.c118 return arg ? ctz32(arg) : zero_val; in HELPER()
/openbmc/qemu/hw/acpi/
H A Dpcihp.c186 int slot = ctz32(slots); in acpi_pcihp_eject_slot()
452 slot = ctz32(data); in pci_write()
/openbmc/qemu/hw/misc/
H A Dmsf2-sysreg.c27 int r = ctz32(div); in msf2_divbits()
/openbmc/qemu/target/arm/
H A Dhyp_gdbstub.c199 addr_bottom = addr_bottom + ctz32(bas); in check_watchpoint_in_range()
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-sme.c50 len = ctz32(streaming_vec_reg_size(s)) - esz; in get_tile_rowcol()
85 pos = esz + ctz32(sizeof(ARMVectorReg)); in get_tile_rowcol()
/openbmc/qemu/hw/ppc/
H A Damigaone.c64 spd[3] = ctz32(rows) - spd[4]; in fix_spd_data()
/openbmc/qemu/hw/nubus/
H A Dnubus-bus.c144 int s = ctz32(nubus->slot_available_mask); in nubus_check_address()

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