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Searched refs:ctrlcfg1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsdram_s10.c220 u32 ctrlcfg1 = hmc_readl(CTRLCFG1); in sdram_mmr_init_full() local
252 io48_value = DDR_CONFIG(CTRLCFG1_CFG_ADDR_ORDER(ctrlcfg1), in sdram_mmr_init_full()
343 if (CTRLCFG1_CFG_CTRL_EN_ECC(ctrlcfg1)) { in sdram_mmr_init_full()
H A Dsdram_arria10.c248 u32 ctrlcfg1 = readl(&socfpga_io48_mmr_base->ctrlcfg1); in sdram_mmr_init() local
282 ((ctrlcfg1 & in sdram_mmr_init()
423 if (ctrlcfg1 & IO48_MMR_CTRLCFG1_CTRL_ENABLE_ECC) { in sdram_mmr_init()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_arria10.h146 u32 ctrlcfg1; member