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Searched refs:ctr_el0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/util/
H A Dcacheflush.c143 asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); in arch_cache_info()
268 const uint64_t ctr_el0 = save_ctr_el0; in flush_idcache_range() local
277 if (!(ctr_el0 & CTR_IDC)) { in flush_idcache_range()
295 if (!(ctr_el0 & CTR_DIC)) { in flush_idcache_range()
/openbmc/u-boot/arch/arm/cpu/armv8/
H A Dcache.S133 mrs x3, ctr_el0
160 mrs x3, ctr_el0
/openbmc/qemu/tests/tcg/aarch64/
H A Dsysregs.c106 get_cpu_reg(ctr_el0); in main()