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/openbmc/qemu/tests/functional/
H A Dtest_x86_cpu_model_versions.py
H A Dtest_cpu_queries.py
/openbmc/qemu/hw/riscv/
H A Dnuma.c40 int i, first_hartid = ms->smp.cpus; in riscv_socket_first_hartid()
46 for (i = 0; i < ms->smp.cpus; i++) { in riscv_socket_first_hartid()
47 if (ms->possible_cpus->cpus[i].props.node_id != socket_id) { in riscv_socket_first_hartid()
55 return (first_hartid < ms->smp.cpus) ? first_hartid : -1; in riscv_socket_first_hartid()
63 return (!socket_id) ? ms->smp.cpus - 1 : -1; in riscv_socket_last_hartid()
66 for (i = 0; i < ms->smp.cpus; i++) { in riscv_socket_last_hartid()
67 if (ms->possible_cpus->cpus[i].props.node_id != socket_id) { in riscv_socket_last_hartid()
75 return (last_hartid < ms->smp.cpus) ? last_hartid : -1; in riscv_socket_last_hartid()
83 return (!socket_id) ? ms->smp.cpus : -1; in riscv_socket_hart_count()
122 if (ms->possible_cpus->cpus[i].props.node_id != socket_id) { in riscv_socket_check_hartids()
[all …]
H A Dxiangshan_kmh.c101 uint32_t num_harts = ms->smp.cpus; in xiangshan_kmh_soc_realize()
103 qdev_prop_set_uint32(DEVICE(&s->cpus), "num-harts", num_harts); in xiangshan_kmh_soc_realize()
104 qdev_prop_set_uint32(DEVICE(&s->cpus), "hartid-base", 0); in xiangshan_kmh_soc_realize()
105 qdev_prop_set_string(DEVICE(&s->cpus), "cpu-type", in xiangshan_kmh_soc_realize()
107 sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); in xiangshan_kmh_soc_realize()
146 object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); in xiangshan_kmh_soc_instance_init()
181 riscv_setup_rom_reset_vec(machine, &s->soc.cpus, in type_init()
H A Dsifive_e.c117 riscv_boot_info_init(&boot_info, &s->soc.cpus); in sifive_e_machine_init()
184 object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); in type_init()
185 object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, in type_init()
187 object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x1004, &error_abort); in type_init()
201 object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, in sifive_e_soc_realize()
203 sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); in sifive_e_soc_realize()
213 (char *)SIFIVE_E_PLIC_HART_CONFIG, ms->smp.cpus, 0, in sifive_e_soc_realize()
224 0, ms->smp.cpus, false); in sifive_e_soc_realize()
227 RISCV_ACLINT_DEFAULT_MTIMER_SIZE, 0, ms->smp.cpus, in sifive_e_soc_realize()
H A Dshakti_c.c65 riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus, firmware_load_addr, in shakti_c_machine_state_init()
109 sysbus_realize(SYS_BUS_DEVICE(&sss->cpus), &error_abort); in type_init()
112 (char *)SHAKTI_C_PLIC_HART_CONFIG, ms->smp.cpus, 0, in type_init()
162 object_initialize_child(obj, "cpus", &sss->cpus, TYPE_RISCV_HART_ARRAY); in shakti_c_soc_instance_init()
170 object_property_set_str(OBJECT(&sss->cpus), "cpu-type", in shakti_c_soc_instance_init()
172 object_property_set_int(OBJECT(&sss->cpus), "num-harts", 1, in shakti_c_soc_instance_init()
H A Dopentitan.c107 riscv_boot_info_init(&boot_info, &s->soc.cpus); in opentitan_machine_init()
131 object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); in lowrisc_ibex_soc_init()
155 object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, in lowrisc_ibex_soc_realize()
157 object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, in lowrisc_ibex_soc_realize()
159 object_property_set_int(OBJECT(&s->cpus), "resetvec", s->resetvec, in lowrisc_ibex_soc_realize()
161 sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); in lowrisc_ibex_soc_realize()
196 for (i = 0; i < ms->smp.cpus; i++) { in lowrisc_ibex_soc_realize()
199 qdev_connect_gpio_out(DEVICE(&s->plic), ms->smp.cpus + i, in lowrisc_ibex_soc_realize()
/openbmc/qemu/hw/intc/
H A Dompic.c52 OR1KOMPICCPUState cpus[OMPIC_MAX_CPUS]; member
64 return s->cpus[src_cpu].control; in ompic_read()
66 return s->cpus[src_cpu].status; in ompic_read()
78 s->cpus[src_cpu].control = data; in ompic_write()
83 s->cpus[dst_cpu].status = OMPIC_STATUS_IRQ_PENDING | in ompic_write()
87 qemu_irq_raise(s->cpus[dst_cpu].irq); in ompic_write()
90 s->cpus[src_cpu].status &= ~OMPIC_STATUS_IRQ_PENDING; in ompic_write()
91 qemu_irq_lower(s->cpus[src_cpu].irq); in ompic_write()
127 sysbus_init_irq(sbd, &s->cpus[i].irq); in or1k_ompic_realize()
151 VMSTATE_STRUCT_ARRAY(cpus, OR1KOMPICState, OMPIC_MAX_CPUS, 1,
/openbmc/qemu/tests/qtest/
H A Dnuma-test.c85 QList *cpus; in test_query_cpus() local
93 cpus = get_cpus(qts, &resp); in test_query_cpus()
94 g_assert(cpus); in test_query_cpus()
96 while ((e = qlist_pop(cpus))) { in test_query_cpus()
123 QList *cpus; in pc_numa_cpu() local
136 cpus = get_cpus(qts, &resp); in pc_numa_cpu()
137 g_assert(cpus); in pc_numa_cpu()
139 while ((e = qlist_pop(cpus))) { in pc_numa_cpu()
177 QList *cpus; in spapr_numa_cpu() local
189 cpus = get_cpus(qts, &resp); in spapr_numa_cpu()
[all …]
H A Dcpu-plug-test.c33 QList *cpus; in test_plug_with_device_add() local
43 resp = qtest_qmp(qts, "{ 'execute': 'query-hotpluggable-cpus'}"); in test_plug_with_device_add()
45 cpus = qdict_get_qlist(resp, "return"); in test_plug_with_device_add()
46 g_assert(cpus); in test_plug_with_device_add()
48 while ((e = qlist_pop(cpus))) { in test_plug_with_device_add()
/openbmc/qemu/hw/openrisc/
H A Dvirt.c103 static qemu_irq get_cpu_irq(OpenRISCCPU *cpus[], int cpunum, int irq_pin) in get_cpu_irq() argument
105 return qdev_get_gpio_in_named(DEVICE(cpus[cpunum]), "IRQ", irq_pin); in get_cpu_irq()
108 static qemu_irq get_per_cpu_irq(OpenRISCCPU *cpus[], int num_cpus, int irq_pin) in get_per_cpu_irq() argument
117 qdev_connect_gpio_out(splitter, i, get_cpu_irq(cpus, i, irq_pin)); in get_per_cpu_irq()
121 return get_cpu_irq(cpus, 0, irq_pin); in get_per_cpu_irq()
201 OpenRISCCPU *cpus[], int irq_pin) in openrisc_virt_ompic_init() argument
215 sysbus_connect_irq(s, i, get_cpu_irq(cpus, i, irq_pin)); in openrisc_virt_ompic_init()
232 OpenRISCCPU *cpus[], int irq_pin) in openrisc_virt_serial_init() argument
236 qemu_irq serial_irq = get_per_cpu_irq(cpus, num_cpus, irq_pin); in openrisc_virt_serial_init()
296 OpenRISCCPU *cpus[], int irq_pin) in openrisc_virt_rtc_init() argument
[all …]
/openbmc/qemu/hw/core/
H A Dmachine-smp.c89 unsigned cpus = config->has_cpus ? config->cpus : 0; in machine_parse_smp_config() local
105 if ((config->has_cpus && config->cpus == 0) || in machine_parse_smp_config()
165 if (cpus == 0 && maxcpus == 0) { in machine_parse_smp_config()
170 maxcpus = maxcpus > 0 ? maxcpus : cpus; in machine_parse_smp_config()
213 cpus = cpus > 0 ? cpus : maxcpus; in machine_parse_smp_config()
215 ms->smp.cpus = cpus; in machine_parse_smp_config()
238 if (maxcpus < cpus) { in machine_parse_smp_config()
243 topo_msg, maxcpus, cpus); in machine_parse_smp_config()
247 if (ms->smp.cpus < mc->min_cpus) { in machine_parse_smp_config()
250 ms->smp.cpus, in machine_parse_smp_config()
/openbmc/qemu/hw/i386/
H A Dx86.c84 return possible_cpus->cpus[cpu_index].props; in x86_cpu_index_to_props()
96 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, in x86_get_default_cpu_node_id()
126 ms->possible_cpus->cpus[i].type = ms->cpu_type; in x86_possible_cpu_arch_ids()
127 ms->possible_cpus->cpus[i].vcpus_count = 1; in x86_possible_cpu_arch_ids()
128 ms->possible_cpus->cpus[i].arch_id = in x86_possible_cpu_arch_ids()
130 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, in x86_possible_cpu_arch_ids()
132 ms->possible_cpus->cpus[i].props.has_socket_id = true; in x86_possible_cpu_arch_ids()
133 ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; in x86_possible_cpu_arch_ids()
135 ms->possible_cpus->cpus[i].props.has_die_id = true; in x86_possible_cpu_arch_ids()
136 ms->possible_cpus->cpus[i].props.die_id = topo_ids.die_id; in x86_possible_cpu_arch_ids()
[all …]
H A Dfw_cfg.c73 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); in fw_cfg_build_smbios()
127 const CPUArchIdList *cpus = mc->possible_cpu_arch_ids(ms); in fw_cfg_arch_create() local
161 for (i = 0; i < cpus->len; i++) { in fw_cfg_arch_create()
162 unsigned int apic_id = cpus->cpus[i].arch_id; in fw_cfg_arch_create()
164 numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id); in fw_cfg_arch_create()
179 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); in fw_cfg_build_feature_control()
H A Dacpi-common.c38 uint32_t apic_id = apic_ids->cpus[uid].arch_id; in pc_madt_cpu_entry()
40 uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ? in pc_madt_cpu_entry()
116 if (apic_ids->cpus[i].arch_id > 254) { in acpi_build_madt()
/openbmc/qemu/tests/unit/
H A Dtest-smp-parse.c34 .has_cpus = ha, .cpus = a, \
43 .cpus = a, \
57 .has_cpus = ha, .cpus = a, \
72 .has_cpus = ha, .cpus = a, \
87 .has_cpus = ha, .cpus = a, \
103 .has_cpus = true, .cpus = a, \
719 config->has_cpus ? "true" : "false", config->cpus, in smp_config_to_string()
774 topo->cpus, topo->drawers, topo->books, in cpu_topology_to_string()
814 (ms->smp.cpus == expect_topo->cpus) && in check_parse()
1073 data.config.cpus *= num_modules; in test_with_modules()
[all …]
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/
H A D0049-corstone1000-Add-secondary-cores-cpu-nodes-for-FVP.patch24 +&cpus {
56 - cpus {
57 + cpus: cpus {
/openbmc/qemu/docs/system/
H A Dcpu-hotplug.rst28 (QEMU) query-hotpluggable-cpus
30 "execute": "query-hotpluggable-cpus",
58 (4) The ``query-hotpluggable-cpus`` command returns an object for CPUs
81 (5) Optionally, run QMP ``query-cpus-fast`` for some details about the
84 (QEMU) query-cpus-fast
87 "execute": "query-cpus-fast",
/openbmc/openbmc/meta-arm/meta-arm/lib/oeqa/runtime/cases/
H A Dfvp_devices.py81 _, cpus = self.run_cmd('find /sys/firmware/devicetree/base/cpus/'
85 count_cpus = int(cpus)
93 _, cpus = self.run_cmd('grep -c "processor" /proc/cpuinfo')
94 self.assertEqual(int(cpus), self.num_cpus)
/openbmc/qemu/hw/acpi/
H A Dcpu_hotplug.c29 AcpiCpuHotplug *cpus = opaque; in cpu_status_read() local
30 uint64_t val = cpus->sts[addr]; in cpu_status_read()
43 AcpiCpuHotplug *cpus = opaque; in cpu_status_write() local
44 object_property_set_bool(cpus->device, "cpu-hotplug-legacy", false, in cpu_status_write()
279 int cpu_apic_id = apic_ids->cpus[i].arch_id; in build_legacy_cpu_hotplug_aml()
313 int cpu_apic_id = apic_ids->cpus[i].arch_id; in build_legacy_cpu_hotplug_aml()
334 int cpu_apic_id = apic_ids->cpus[i].arch_id; in build_legacy_cpu_hotplug_aml()
339 aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0)); in build_legacy_cpu_hotplug_aml()
/openbmc/qemu/tests/migration-stress/guestperf/
H A Dhardware.py22 def __init__(self, cpus=1, mem=1, argument
28 self._cpus = cpus
/openbmc/openbmc/poky/meta/recipes-devtools/python/python3/
H A D0001-test_active_children-skip-problematic-test.patch21 self.assertTrue(type(cpus) is int)
22 self.assertTrue(cpus >= 1)
/openbmc/qemu/hw/loongarch/
H A Dvirt.c375 cs = possible_cpus->cpus[num].cpu; in virt_cpu_irq_init()
814 for (i = 0; i < machine->smp.cpus; i++) { in virt_init()
1009 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { in virt_find_cpu_slot()
1010 return &ms->possible_cpus->cpus[n]; in virt_find_cpu_slot()
1022 if (ms->possible_cpus->cpus[n].cpu == NULL) { in virt_find_empty_cpu_slot()
1023 return &ms->possible_cpus->cpus[n]; in virt_find_empty_cpu_slot()
1088 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; in virt_cpu_pre_plug()
1283 ms->possible_cpus->cpus[n].type = ms->cpu_type; in virt_possible_cpu_arch_ids()
1284 ms->possible_cpus->cpus[n].arch_id = arch_id; in virt_possible_cpu_arch_ids()
1285 ms->possible_cpus->cpus[n].vcpus_count = 1; in virt_possible_cpu_arch_ids()
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/nmon/nmon/
H A D0001-Fix-a-lot-of-Werror-format-security-errors-with-mvpr.patch62 } /* for (i = 0; i < cpus; i++) */
75 } /* if (cpus > 1 || !cursed) */
103 mvwprintw(padwide, 1, 6, "CPU(s)=%d", cpus);
107 if (cpus > 63) {
134 if (cpus > 127) {
/openbmc/openbmc/meta-ieisystem/meta-fp5280g3/recipes-phosphor/occ/
H A Dopenpower-occ-control_%.bbappend3 EXTRA_OEMESON:append = " -Dmax-cpus=4"

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