Searched refs:cpu_crf (Results 1 – 8 of 8) sorted by relevance
/openbmc/qemu/target/ppc/translate/ |
H A D | fp-impl.c.inc | 23 tcg_gen_shri_i32(cpu_crf[1], tmp, 28); 28 tcg_gen_shri_tl(cpu_crf[1], cpu_fpscr, 28); 537 tcg_gen_andi_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], 697 tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); 698 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX); 717 tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); 718 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX); 753 tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); 754 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX); 782 tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); [all …]
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H A D | dfp-impl.c.inc | 34 gen_helper_##NAME(cpu_crf[a->bf], \ 46 gen_helper_##NAME(cpu_crf[a->bf], \ 58 gen_helper_##NAME(cpu_crf[a->bf], \
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H A D | storage-ctrl-impl.c.inc | 144 tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); 146 tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ);
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H A D | spe-impl.c.inc | 272 tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 0); \ 275 tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], \ 280 tcg_gen_andi_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], \ 284 tcg_gen_ori_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], \ 368 tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 3); 375 tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 2); 960 gen_helper_##name(cpu_crf[crfD(ctx->opcode)], tcg_env, t0, t1); \ 974 gen_helper_##name(cpu_crf[crfD(ctx->opcode)], tcg_env, t0, t1); \
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H A D | vmx-impl.c.inc | 1233 tcg_gen_extrl_i64_i32(cpu_crf[6], tmp); 1350 tcg_gen_extrl_i64_i32(cpu_crf[6], t1); 1351 tcg_gen_andi_i32(cpu_crf[6], cpu_crf[6], 0xa); 1352 tcg_gen_xori_i32(cpu_crf[6], cpu_crf[6], 0x2); 1380 tcg_gen_extrl_i64_i32(cpu_crf[6], t1); 1381 tcg_gen_andi_i32(cpu_crf[6], cpu_crf[6], 0xa); 1382 tcg_gen_xori_i32(cpu_crf[6], cpu_crf[6], 0x2); 1414 tcg_gen_movi_i32(cpu_crf[a->bf], CRF_EQ); 1418 tcg_gen_movi_i32(cpu_crf[a->bf], CRF_GT); 1422 tcg_gen_movi_i32(cpu_crf[a->bf], CRF_LT); [all …]
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H A D | fixedpoint-impl.c.inc | 347 tcg_gen_extu_i32_tl(temp, cpu_crf[a->bi >> 2]);
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H A D | vsx-impl.c.inc | 804 gen_helper_##name(cpu_crf[6], tcg_env, xt, xa, xb); \ 1811 tcg_gen_extrl_i64_i32(cpu_crf[a->bf], t0);
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 66 static TCGv_i32 cpu_crf[8]; variable 1488 tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t); in gen_op_cmp() 3832 tcg_gen_trunc_tl_i32(cpu_crf[0], cr0); in gen_conditional_store() 3931 tcg_gen_trunc_tl_i32(cpu_crf[0], cr0); in gen_stqcx_() 4457 tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]); in gen_mcrf() 4695 tcg_gen_mov_i32(t0, cpu_crf[0]); in gen_mfcr() 4697 tcg_gen_or_i32(t0, t0, cpu_crf[1]); in gen_mfcr() 4699 tcg_gen_or_i32(t0, t0, cpu_crf[2]); in gen_mfcr() 4814 tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf); in gen_mtcrf() 5831 tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 0x02); in gen_tlbsx_40x() [all …]
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