Searched refs:cp_table_size (Results 1 – 8 of 8) sorted by relevance
203 u32 cp_table_size; member
162 r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size, in amdgpu_gfx_rlc_init_cpt()
3246 adev->gfx.rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */ in gfx_v7_0_rlc_init()3247 adev->gfx.rlc.cp_table_size += 64 * 1024; /* GDS */ in gfx_v7_0_rlc_init()3269 if (adev->gfx.rlc.cp_table_size) { in gfx_v7_0_rlc_init()4496 if (adev->gfx.rlc.cp_table_size) { in gfx_v7_0_sw_fini()
1283 adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ in gfx_v8_0_rlc_init()
1666 adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ in gfx_v9_0_rlc_init()
4328 if (rdev->rlc.cp_table_size) { in sumo_rlc_init()4330 r = radeon_bo_create(rdev, rdev->rlc.cp_table_size, in sumo_rlc_init()
962 u32 cp_table_size; member
8320 rdev->rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */ in cik_startup()8321 rdev->rlc.cp_table_size += 64 * 1024; /* GDS */ in cik_startup()