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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dfsl-usb.txt1 Freescale SOC USB controllers
10 controllers, or "fsl-usb2-dr" for dual role USB controllers
11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
14 - phy_type : For multi port host USB controllers, should be one of
15 "ulpi", or "serial". For dual role USB controllers, should be
19 fsl-usb2-mph compatible controllers. Either this property or
21 controllers.
23 fsl-usb2-mph compatible controllers. Either this property or
25 controllers.
27 controllers. Can be "host", "peripheral", or "otg". Default to
H A Dusb-drd.yaml25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
34 Tells OTG controllers we want to disable OTG HNP. Normally HNP is the
41 Tells OTG controllers we want to disable OTG SRP. SRP is optional for OTG
47 Tells OTG controllers we want to disable OTG ADP. ADP is optional for OTG
H A Dusb.yaml35 Tells USB controllers that we want to configure the core to support a
39 selected. In case this isn't passed via DT, USB controllers should
46 Tells USB controllers we want to work up to a certain speed. In case this
47 isn't passed via DT, USB controllers should default to their maximum HW
/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Domap_serial.txt4 - compatible : should be "ti,omap2-uart" for OMAP2 controllers
5 - compatible : should be "ti,omap3-uart" for OMAP3 controllers
6 - compatible : should be "ti,omap4-uart" for OMAP4 controllers
7 - compatible : should be "ti,am4372-uart" for AM437x controllers
8 - compatible : should be "ti,am3352-uart" for AM335x controllers
9 - compatible : should be "ti,dra742-uart" for DRA7x controllers
/openbmc/linux/drivers/net/can/spi/
H A DKconfig6 tristate "Holt HI311x SPI CAN controllers"
8 Driver for the Holt HI311x SPI CAN controllers.
11 tristate "Microchip MCP251x and MCP25625 SPI CAN controllers"
14 controllers.
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc39 - One serial ATA (SATA 3.0) controllers
45 - Four I2C controllers
113 - Two serial ATA (SATA 3.0) controllers
118 - Four I2C controllers
154 - Two I2C controllers
198 - One serial ATA (SATA 3.0) controllers
204 - Four I2C controllers
240 - Two serial ATA (SATA 3.0) controllers
245 - Four I2C controllers
304 Four PCIe Gen 4.0 4-lane controllers.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-omap.txt8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers
9 Should be "ti,omap3-sdhci" for omap3 controllers
10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers
11 Should be "ti,omap5-sdhci" for omap5 controllers
12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
14 Should be "ti,am335-sdhci" for am335x controllers
15 Should be "ti,am437-sdhci" for am437x controllers
H A Dk3-dw-mshc.txt15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
/openbmc/linux/include/linux/mux/
H A Ddriver.h65 unsigned int controllers; member
83 return &mux_chip->mux[mux_chip->controllers]; in mux_chip_priv()
87 unsigned int controllers, size_t sizeof_priv);
93 unsigned int controllers,
/openbmc/linux/drivers/mux/
H A Dcore.c93 unsigned int controllers, size_t sizeof_priv) in mux_chip_alloc() argument
98 if (WARN_ON(!dev || !controllers)) in mux_chip_alloc()
102 controllers * sizeof(*mux_chip->mux) + in mux_chip_alloc()
124 mux_chip->controllers = controllers; in mux_chip_alloc()
125 for (i = 0; i < controllers; ++i) { in mux_chip_alloc()
168 for (i = 0; i < mux_chip->controllers; ++i) { in mux_chip_register()
236 unsigned int controllers, in devm_mux_chip_alloc() argument
245 mux_chip = mux_chip_alloc(dev, controllers, sizeof_priv); in devm_mux_chip_alloc()
575 (args.args_count < 2 && mux_chip->controllers > 1)) { in mux_get()
591 (!args.args_count && mux_chip->controllers > 1)) { in mux_get()
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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb3phy.yaml16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
22 controllers.
30 The USB architecture includes three XHCI controllers.
31 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
38 The USB architecture includes three XHCI controllers.
39 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
H A Drealtek,usb2phy.yaml16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
22 controllers.
30 The USB architecture includes two XHCI controllers.
38 The USB architecture includes three XHCI controllers.
39 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
46 The USB architecture includes three XHCI controllers.
47 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
54 The USB architecture includes three XHCI controllers.
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra20-i2c.yaml39 Tegra114 has 5 generic I2C controllers. This controller is very much
52 Tegra124 has 6 generic I2C controllers. These controllers are very
57 Tegra210 has 6 generic I2C controllers. These controllers are very
66 the regular I2C controllers with a few exceptions. The I2C registers
72 Tegra186 has 9 generic I2C controllers, two of which are in the AON
73 (always-on) partition of the SoC. All of these controllers are very
77 Tegra194 has 8 generic I2C controllers, two of which are in the AON
78 (always-on) partition of the SoC. All of these controllers are very
79 similar to those found on Tegra186. However, these controllers have
/openbmc/linux/Documentation/input/devices/
H A Dxpad.rst2 xpad - Linux USB driver for Xbox compatible controllers
6 controllers. It has a long history and has enjoyed considerable usage
11 This only affects Original Xbox controllers. All later controller models
14 Rumble is supported on some models of Xbox 360 controllers but not of
15 Original Xbox controllers nor on Xbox One controllers. As of writing
39 unknown controllers.
95 All generations of Xbox controllers speak USB over the wire.
100 - Wired Xbox 360 controllers use standard USB connectors.
101 - Xbox One controllers can be wireless but speak Wi-Fi Direct and are not
176 Unrecognized models of Xbox controllers should function as Generic
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/openbmc/linux/drivers/dma/lgm/
H A DKconfig3 bool "Lightning Mountain centralized DMA controllers"
8 Enable support for Intel Lightning Mountain SOC DMA controllers.
9 These controllers provide DMA capabilities for a variety of on-chip
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-pci-drivers-ehci_hcd7 PCI-based EHCI USB controllers (i.e., high-speed USB-2.0
8 controllers) are often implemented along with a set of
9 "companion" full/low-speed USB-1.1 controllers. When a
35 Note: Some EHCI controllers do not have companions; they
38 mechanism will not work with such controllers. Also, it
/openbmc/linux/Documentation/PCI/endpoint/
H A Dpci-endpoint-cfs.rst25 The pci_ep configfs has two directories at its root: controllers and
27 the *controllers* directory and every EPF driver present in the system
32 .. controllers/
38 Every registered EPF driver will be listed in controllers directory. The
94 Every registered EPC device will be listed in controllers directory. The
98 /sys/kernel/config/pci_ep/controllers/
119 | controllers/
H A Dpci-ntb-howto.rst31 # ls /sys/kernel/config/pci_ep/controllers
111 NTB function device should be attached to two PCI endpoint controllers
117 # ln -s controllers/2900000.pcie-ep/ functions/pci-epf-ntb/func1/primary
118 # ln -s controllers/2910000.pcie-ep/ functions/pci-epf-ntb/func1/secondary
120 Once the above step is completed, both the PCI endpoint controllers are ready to
128 field should be populated with '1'. For NTB, both the PCI endpoint controllers
131 # echo 1 > controllers/2900000.pcie-ep/start
132 # echo 1 > controllers/2910000.pcie-ep/start
/openbmc/u-boot/drivers/pinctrl/
H A DKconfig5 menu "Pin controllers"
8 bool "Support pin controllers"
15 bool "Support full pin controllers"
31 bool "Support generic pin controllers"
45 bool "Support pin multiplexing controllers"
56 bool "Support pin configuration controllers"
63 bool "Support pin controllers in SPL"
70 bool "Support full pin controllers in SPL"
79 bool "Support generic pin controllers in SPL"
87 bool "Support pin multiplexing controllers in SPL"
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/openbmc/u-boot/board/freescale/ls1012ardb/
H A DREADME28 - Two enhanced secure digital host controllers:
33 - 2 I2C controllers
36 - The LS1012A processor consists of two UART controllers,
69 - 2 I2C controllers
72 - The LS1012A processor consists of two UART controllers,
/openbmc/u-boot/doc/device-tree-bindings/usb/
H A Dtegra-usb.txt1 Tegra SOC USB controllers
9 - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
17 nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drenesas,dbsc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#
13 Renesas SoCs contain one or more memory controllers. These memory
14 controllers differ from one SoC variant to another, and are called by
/openbmc/linux/drivers/ata/
H A DKconfig144 controllers.
415 comment "SATA SFF controllers with BMDMA"
424 host controllers.
556 comment "PATA SFF controllers with BMDMA"
609 controllers.
722 controllers via the new ATA layer.
731 PATA controllers via the new ATA layer
888 PATA controllers via the new ATA layer
995 comment "PIO-only SFF controllers"
1136 PATA controllers via the new ATA layer
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
71 $ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
80 $ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
89 $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
98 $ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmsi.txt1 This document describes the generic device tree binding for MSI controllers and
9 those busses to the MSI controllers which they are capable of using,
22 MSI controllers may have restrictions on permitted payloads.
31 MSI controllers:
68 MSI controllers listed in the msi-parent property.
131 * Can generate MSIs to all of the MSI controllers.

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