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Searched refs:control0 (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Ddmc_init_exynos4.c40 .control0 = CONTROL0_VAL,
59 writel((mem.control0 | (0 << mem.dll_on)), in phy_control_reset()
61 writel((mem.control0 | (1 << mem.dll_on)), in phy_control_reset()
108 writel((mem.control0 | CTRL_START | CTRL_DLL_ON), &dmc->phycontrol0); in dmc_init()
H A Dexynos4_setup.h412 unsigned control0; member
/openbmc/openbmc/meta-ufispace/meta-ncplite/recipes-phosphor/state/phosphor-state-manager/
H A Dchassis-control26 gpioset --hold-period 50ms -t0 power-chassis-control0=1
37 gpioset --hold-period 50ms -t0 power-chassis-control0=0
/openbmc/linux/drivers/rtc/
H A Drtc-gamecube.c193 int control0; in gamecube_rtc_ioctl() local
198 ret = regmap_read(d->regmap, RTC_CONTROL0, &control0); in gamecube_rtc_ioctl()
203 if (control0 & RTC_CONTROL0_UNSTABLE_POWER) in gamecube_rtc_ioctl()
205 if (control0 & RTC_CONTROL0_LOW_BATTERY) in gamecube_rtc_ioctl()
/openbmc/linux/drivers/gpu/drm/i2c/
H A Dsil164_drv.c160 uint8_t control0 = sil164_read(client, SIL164_CONTROL0); in sil164_set_power_state() local
163 control0 |= SIL164_CONTROL0_POWER_ON; in sil164_set_power_state()
165 control0 &= ~SIL164_CONTROL0_POWER_ON; in sil164_set_power_state()
167 sil164_write(client, SIL164_CONTROL0, control0); in sil164_set_power_state()
/openbmc/linux/include/linux/amba/
H A Dpl080.h206 u32 control0; member
213 u32 control0; member
/openbmc/linux/drivers/crypto/
H A Dmxs-dcp.c49 uint32_t control0; member
254 desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | in mxs_dcp_run_aes()
259 desc->control0 |= MXS_DCP_CONTROL0_PAYLOAD_KEY; in mxs_dcp_run_aes()
262 desc->control0 |= MXS_DCP_CONTROL0_CIPHER_ENCRYPT; in mxs_dcp_run_aes()
264 desc->control0 |= MXS_DCP_CONTROL0_CIPHER_INIT; in mxs_dcp_run_aes()
564 desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | in mxs_dcp_run_sha()
568 desc->control0 |= MXS_DCP_CONTROL0_HASH_INIT; in mxs_dcp_run_sha()
599 desc->control0 |= MXS_DCP_CONTROL0_HASH_TERM; in mxs_dcp_run_sha()
/openbmc/linux/drivers/video/fbdev/
H A Dvt8500lcdfb.c44 unsigned long control0; in vt8500lcd_set_par() local
112 control0 = readl(fbi->regbase) & ~0xf; in vt8500lcd_set_par()
127 writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); in vt8500lcd_set_par()
/openbmc/linux/drivers/crypto/inside-secure/
H A Dsafexcel_cipher.c519 cdesc->control_data.control0 = in safexcel_context_control()
526 cdesc->control_data.control0 = in safexcel_context_control()
537 cdesc->control_data.control0 = in safexcel_context_control()
547 cdesc->control_data.control0 |= in safexcel_context_control()
550 cdesc->control_data.control0 |= in safexcel_context_control()
560 cdesc->control_data.control0 = in safexcel_context_control()
565 cdesc->control_data.control0 = in safexcel_context_control()
572 cdesc->control_data.control0 |= in safexcel_context_control()
575 cdesc->control_data.control0 |= in safexcel_context_control()
597 cdesc->control_data.control0 |= in safexcel_context_control()
[all …]
H A Dsafexcel_hash.c115 cdesc->control_data.control0 = ctx->alg; in safexcel_context_control()
130 cdesc->control_data.control0 |= in safexcel_context_control()
137 cdesc->control_data.control0 |= in safexcel_context_control()
146 cdesc->control_data.control0 |= req->digest | in safexcel_context_control()
152 cdesc->control_data.control0 |= req->digest | in safexcel_context_control()
188 cdesc->control_data.control0 |= in safexcel_context_control()
194 cdesc->control_data.control0 |= in safexcel_context_control()
210 cdesc->control_data.control0 |= in safexcel_context_control()
216 cdesc->control_data.control0 |= in safexcel_context_control()
H A Dsafexcel.h377 __le32 control0; member
596 u32 control0; member
H A Dsafexcel.c991 cdesc->control_data.control0 = CONTEXT_CONTROL_INV_TR; in safexcel_invalidate_cache()
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Ddma.h144 __le32 control0; member
H A Ddma.c207 desc->dma64.control0 = cpu_to_le32(ctl0); in op64_fill_descriptor()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dkeystone-pll.txt17 - reg - pll control0 and pll multiplier registers
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ufispace-ncplite.dts351 /*N0-N7*/ "power-chassis-control0","power-chassis-control1","","","","","","",