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Searched refs:col_bits (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/hw/misc/
H A Dallwinner-r40-dramc.c76 uint8_t col_bits; member
88 .col_bits = 13,
93 .col_bits = 13,
98 .col_bits = 13,
141 for (int i = 0; i < ddr->col_bits; i++) { in address_to_autodetect_cells()
153 uint8_t bank_bits, uint8_t col_bits) in allwinner_r40_dramc_map_rows() argument
158 trace_allwinner_r40_dramc_map_rows(row_bits, bank_bits, col_bits); in allwinner_r40_dramc_map_rows()
166 s->set_col_bits = col_bits; in allwinner_r40_dramc_map_rows()
170 || ddr->col_bits != col_bits; in allwinner_r40_dramc_map_rows()
H A Dtrace-events21 …s(uint8_t row_bits, uint8_t bank_bits, uint8_t col_bits) "DRAM layout: row_bits %d, bank_bits %d, …
/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c149 col_bits; in mpc83xx_sdram_static_init() local
262 col_bits = ofnode_read_u32_default(node, "col_bits", 0); in mpc83xx_sdram_static_init()
263 switch (col_bits) { in mpc83xx_sdram_static_init()
278 ofnode_get_name(node), col_bits); in mpc83xx_sdram_static_init()
/openbmc/u-boot/Documentation/devicetree/bindings/ram/
H A Dfsl,mpc83xx-mem-controller.txt240 - col_bits: Number of column bits for SDRAM on chip select; possible
312 col_bits = <10>;