Searched refs:col_bits (Results 1 – 6 of 6) sorted by relevance
/openbmc/qemu/hw/misc/ |
H A D | allwinner-r40-dramc.c | 76 uint8_t col_bits; member 88 .col_bits = 13, 93 .col_bits = 13, 98 .col_bits = 13, 141 for (int i = 0; i < ddr->col_bits; i++) { in address_to_autodetect_cells() 153 uint8_t bank_bits, uint8_t col_bits) in allwinner_r40_dramc_map_rows() argument 158 trace_allwinner_r40_dramc_map_rows(row_bits, bank_bits, col_bits); in allwinner_r40_dramc_map_rows() 166 s->set_col_bits = col_bits; in allwinner_r40_dramc_map_rows() 170 || ddr->col_bits != col_bits; in allwinner_r40_dramc_map_rows()
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H A D | trace-events | 21 …s(uint8_t row_bits, uint8_t bank_bits, uint8_t col_bits) "DRAM layout: row_bits %d, bank_bits %d, …
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/openbmc/linux/drivers/mtd/nand/raw/bcm47xxnflash/ |
H A D | ops_bcm4706.c | 379 u8 tbits, col_bits, col_size, row_bits, row_bsize; in bcm47xxnflash_ops_bcm4706_init() local 437 col_bits = b47n->nand_chip.page_shift + 1; in bcm47xxnflash_ops_bcm4706_init() 438 col_size = (col_bits + 7) / 8; in bcm47xxnflash_ops_bcm4706_init() 440 row_bits = tbits - col_bits + 1; in bcm47xxnflash_ops_bcm4706_init()
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/openbmc/u-boot/drivers/ram/ |
H A D | mpc83xx_sdram.c | 149 col_bits; in mpc83xx_sdram_static_init() local 262 col_bits = ofnode_read_u32_default(node, "col_bits", 0); in mpc83xx_sdram_static_init() 263 switch (col_bits) { in mpc83xx_sdram_static_init() 278 ofnode_get_name(node), col_bits); in mpc83xx_sdram_static_init()
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/openbmc/linux/drivers/edac/ |
H A D | dmc520_edac.c | 352 u32 reg_val, col_bits, row_bits, bank_bits; in dmc520_get_rank_size() local 356 col_bits = FIELD_GET(REG_FIELD_ADDRESS_CONTROL_COL, reg_val) + in dmc520_get_rank_size() 362 return (u64)pvt->mem_width_in_bytes << (col_bits + row_bits + bank_bits); in dmc520_get_rank_size()
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/openbmc/u-boot/Documentation/devicetree/bindings/ram/ |
H A D | fsl,mpc83xx-mem-controller.txt | 240 - col_bits: Number of column bits for SDRAM on chip select; possible 312 col_bits = <10>;
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