Searched refs:clr_pll_con0 (Results 1 – 1 of 1) sorted by relevance
103 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local127 clr_pll_con0 = SDIV(7) | PDIV(63) | MDIV(1023) | FSEL(1); in board_clock_init()130 clrsetbits_le32(&clk->apll_con0, clr_pll_con0, set); in board_clock_init()213 clrsetbits_le32(&clk->mpll_con0, clr_pll_con0, set); in board_clock_init()