| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | clock.c | 588 int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon) in clock_set_rate() function
765 clock_set_rate(CLOCK_ID_PERIPH, 408, 12, 0, 8); in tegra30_set_up_pllp()
766 clock_set_rate(CLOCK_ID_CGENERAL, 456, 12, 1, 8); in tegra30_set_up_pllp()
770 clock_set_rate(CLOCK_ID_PERIPH, 408, 26, 0, 8); in tegra30_set_up_pllp()
771 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in tegra30_set_up_pllp()
775 clock_set_rate(CLOCK_ID_PERIPH, 408, 13, 0, 8); in tegra30_set_up_pllp()
776 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in tegra30_set_up_pllp()
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra20/ |
| H A D | clock.c | 588 clock_set_rate(CLOCK_ID_PERIPH, 432, 12, 1, 8); in clock_early_init()
589 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
593 clock_set_rate(CLOCK_ID_PERIPH, 432, 26, 1, 8); in clock_early_init()
594 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
598 clock_set_rate(CLOCK_ID_PERIPH, 432, 13, 1, 8); in clock_early_init()
599 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra114/ |
| H A D | clock.c | 674 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
675 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
679 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
680 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
684 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
685 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra210/ |
| H A D | clock.c | 984 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
985 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
989 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
990 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
994 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
995 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
998 clock_set_rate(CLOCK_ID_CGENERAL, 125, 4, 0, 0); in clock_early_init()
999 clock_set_rate(CLOCK_ID_DISPLAY, 96, 2, 0, 12); in clock_early_init()
1002 clock_set_rate(CLOCK_ID_CGENERAL, 125, 8, 0, 0); in clock_early_init()
1003 clock_set_rate(CLOCK_ID_DISPLAY, 96, 4, 0, 0); in clock_early_init()
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra124/ |
| H A D | clock.c | 854 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
855 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
859 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
860 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
864 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
865 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
1132 clock_set_rate(CLOCK_ID_DISPLAY, best_n, best_m, best_p, cpcon); in clock_set_display_rate()
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| /openbmc/u-boot/arch/arm/include/asm/arch-tegra/ |
| H A D | clock.h | 371 int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon);
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