| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | clock.c | 41 uint32_t clkctrl, clkseq, div; in mxs_get_pclk() local
44 clkctrl = readl(&clkctrl_regs->hw_clkctrl_cpu); in mxs_get_pclk()
47 if (clkctrl & in mxs_get_pclk()
56 div = (clkctrl & CLKCTRL_CPU_DIV_XTAL_MASK) >> in mxs_get_pclk()
64 div = clkctrl & CLKCTRL_CPU_DIV_CPU_MASK; in mxs_get_pclk()
74 uint32_t clkctrl; in mxs_get_hclk() local
76 clkctrl = readl(&clkctrl_regs->hw_clkctrl_hbus); in mxs_get_hclk()
79 if (clkctrl & CLKCTRL_HBUS_DIV_FRAC_EN) in mxs_get_hclk()
82 div = clkctrl & CLKCTRL_HBUS_DIV_MASK; in mxs_get_hclk()
91 uint32_t clkctrl, clkseq, div; in mxs_get_emiclk() local
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| /openbmc/u-boot/arch/arm/mach-omap2/am33xx/ |
| H A D | clock_ti814x.c | 87 unsigned int clkctrl; member
243 read_clkctrl = readl(&adpll->clkctrl); in pll_config()
244 writel((read_clkctrl | ADPLLJ_CLKCTRL_IDLE), &adpll->clkctrl); in pll_config()
250 read_clkctrl = readl(&adpll->clkctrl); in pll_config()
251 writel((read_clkctrl & ~ADPLLJ_CLKCTRL_TINITZ), &adpll->clkctrl); in pll_config()
258 read_clkctrl = readl(&adpll->clkctrl) & in pll_config()
268 writel((read_clkctrl | hs_mod), &adpll->clkctrl); in pll_config()
280 read_clkctrl = readl(&adpll->clkctrl) & ~ADPLLJ_CLKCTRL_CLKDCO; in pll_config()
283 &adpll->clkctrl); in pll_config()
286 read_clkctrl = readl(&adpll->clkctrl) & ~ADPLLJ_CLKCTRL_IDLE; in pll_config()
[all …]
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| H A D | clock.c | 120 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED; in wait_for_clk_enable() local
125 clkctrl = readl(clkctrl_addr); in wait_for_clk_enable()
126 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> in wait_for_clk_enable()
130 clkctrl_addr, clkctrl); in wait_for_clk_enable()
148 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; in wait_for_clk_disable() local
152 clkctrl = readl(clkctrl_addr); in wait_for_clk_disable()
153 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> in wait_for_clk_disable()
157 clkctrl_addr, clkctrl); in wait_for_clk_disable()
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| H A D | clock_am43xx.c | 55 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED; in setup_clocks_for_console() local
70 clkctrl = readl(&cmwkup->wkup_uart0ctrl); in setup_clocks_for_console()
71 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> in setup_clocks_for_console()
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| /openbmc/u-boot/drivers/video/exynos/ |
| H A D | exynos_mipi_dsi_lowlevel.c | 295 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_enable_pll_bypass()
300 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_pll_bypass()
359 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_set_byte_clock_src()
364 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_set_byte_clock_src()
372 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_enable_byte_clock()
377 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_byte_clock()
385 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_set_esc_clk_prs()
392 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_set_esc_clk_prs()
400 unsigned int reg = readl(&mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_esc_clk_on_lane()
407 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_esc_clk_on_lane()
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| /openbmc/qemu/hw/misc/ |
| H A D | max78000_gcr.c | 29 s->clkctrl = 0x3e140008; in max78000_gcr_reset_hold()
60 return s->clkctrl; in max78000_gcr_read()
172 s->clkctrl = val | SYSCLK_RDY; in max78000_gcr_write()
289 VMSTATE_UINT32(clkctrl, Max78000GcrState),
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| /openbmc/u-boot/arch/arm/mach-omap2/ |
| H A D | clocks-common.c | 678 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED; in wait_for_clk_enable() local
684 clkctrl = readl(clkctrl_addr); in wait_for_clk_enable()
685 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> in wait_for_clk_enable()
689 clkctrl_addr, clkctrl); in wait_for_clk_enable()
707 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; in wait_for_clk_disable() local
711 clkctrl = readl(clkctrl_addr); in wait_for_clk_disable()
712 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> in wait_for_clk_disable()
716 clkctrl_addr, clkctrl); in wait_for_clk_disable()
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| H A D | emif-common.c | 1457 u32 val, i, clkctrl; in do_bug0039_workaround() local
1470 clkctrl = __raw_readl((*prcm)->cm_memif_clkstctrl); in do_bug0039_workaround()
1488 __raw_writel(clkctrl, (*prcm)->cm_memif_clkstctrl); in do_bug0039_workaround()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | am33xx-clocks.dtsi | 550 compatible = "ti,clkctrl";
564 compatible = "ti,clkctrl";
578 compatible = "ti,clkctrl";
592 compatible = "ti,clkctrl";
606 compatible = "ti,clkctrl";
620 compatible = "ti,clkctrl";
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| /openbmc/qemu/include/hw/misc/ |
| H A D | max78000_gcr.h | 103 uint32_t clkctrl; member
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| /openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | dsim.h | 17 unsigned int clkctrl; member
|