Searched refs:cha_num (Results 1 – 3 of 3) sorted by relevance
312 #define SXGBE_DMA_CHA_CTL_REG(cha_num) \ argument313 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x00)316 #define SXGBE_DMA_CHA_TXCTL_REG(cha_num) \ argument317 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x04)318 #define SXGBE_DMA_CHA_RXCTL_REG(cha_num) \ argument320 #define SXGBE_DMA_CHA_TXDESC_HADD_REG(cha_num) \ argument322 #define SXGBE_DMA_CHA_TXDESC_LADD_REG(cha_num) \ argument324 #define SXGBE_DMA_CHA_RXDESC_HADD_REG(cha_num) \ argument326 #define SXGBE_DMA_CHA_RXDESC_LADD_REG(cha_num) \ argument336 #define SXGBE_DMA_CHA_INT_ENABLE_REG(cha_num) \ argument[all …]
50 reg_val = readl(ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()54 writel(reg_val, ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()56 reg_val = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()58 writel(reg_val, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()67 ioaddr + SXGBE_DMA_CHA_TXDESC_HADD_REG(cha_num)); in sxgbe_dma_channel_init()69 ioaddr + SXGBE_DMA_CHA_TXDESC_LADD_REG(cha_num)); in sxgbe_dma_channel_init()72 ioaddr + SXGBE_DMA_CHA_RXDESC_HADD_REG(cha_num)); in sxgbe_dma_channel_init()74 ioaddr + SXGBE_DMA_CHA_RXDESC_LADD_REG(cha_num)); in sxgbe_dma_channel_init()82 ioaddr + SXGBE_DMA_CHA_TXDESC_TAILPTR_REG(cha_num)); in sxgbe_dma_channel_init()86 ioaddr + SXGBE_DMA_CHA_RXDESC_LADD_REG(cha_num)); in sxgbe_dma_channel_init()[all …]
23 void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst,