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Searched refs:ch_num (Results 1 – 25 of 46) sorted by relevance

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/openbmc/linux/drivers/usb/musb/
H A Dux500_dma.c37 u8 ch_num; member
135 u8 ch_num = hw_ep->epnum - 1; in ux500_dma_channel_allocate() local
141 if (ch_num > 7) in ux500_dma_channel_allocate()
142 ch_num -= 8; in ux500_dma_channel_allocate()
144 if (ch_num >= UX500_MUSB_DMA_NUM_RX_TX_CHANNELS) in ux500_dma_channel_allocate()
147 ux500_channel = is_tx ? &(controller->tx_channel[ch_num]) : in ux500_dma_channel_allocate()
148 &(controller->rx_channel[ch_num]) ; in ux500_dma_channel_allocate()
158 hw_ep->epnum, is_tx, ch_num); in ux500_dma_channel_allocate()
168 dev_dbg(musb->controller, "channel=%d\n", ux500_channel->ch_num); in ux500_dma_channel_release()
216 ux500_channel->ch_num, ux500_channel->is_tx); in ux500_dma_channel_abort()
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H A Dmusb_cppi41.c488 u8 ch_num = hw_ep->epnum - 1; in cppi41_dma_channel_allocate() local
490 if (ch_num >= controller->num_channels) in cppi41_dma_channel_allocate()
494 cppi41_channel = &controller->tx_channel[ch_num]; in cppi41_dma_channel_allocate()
496 cppi41_channel = &controller->rx_channel[ch_num]; in cppi41_dma_channel_allocate()
/openbmc/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-dev.h129 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres);
130 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr,
132 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en);
133 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num,
135 void dcss_dpr_set_rotation(struct dcss_dpr *dpr, int ch_num, u32 rotation);
149 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha);
150 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num,
152 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num,
154 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en);
168 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num,
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H A Ddcss-plane.c175 dcss_scaler_get_min_max_ratios(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_check()
244 dcss_dpr_addr_set(dcss->dpr, dcss_plane->ch_num, p1_ba, p2_ba, in dcss_plane_atomic_set_base()
312 dcss_dpr_format_set(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
316 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h); in dcss_plane_atomic_update()
317 dcss_dpr_set_rotation(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
325 dcss_scaler_set_filter(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_update()
328 dcss_scaler_setup(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_update()
335 dcss_dtg_plane_pos_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
337 dcss_dtg_plane_alpha_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
340 if (!dcss_plane->ch_num && (new_state->alpha >> 8) == 0) in dcss_plane_atomic_update()
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H A Ddcss-dtg.c258 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num, in dcss_dtg_plane_pos_set() argument
270 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
271 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
274 DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
276 DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
280 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha) in dcss_dtg_global_alpha_changed() argument
282 if (ch_num) in dcss_dtg_global_alpha_changed()
288 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num, in dcss_dtg_plane_alpha_set() argument
292 if (ch_num) in dcss_dtg_plane_alpha_set()
340 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en) in dcss_dtg_ch_enable() argument
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H A Ddcss-dpr.c109 int ch_num; member
146 ch->ch_num = i; in dcss_dpr_ch_init_all()
232 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres) in dcss_dpr_set_res() argument
234 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_set_res()
259 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr, in dcss_dpr_addr_set() argument
262 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_addr_set()
340 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en) in dcss_dpr_enable() argument
342 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_enable()
477 switch (ch->ch_num) { in dcss_dpr_tile_set()
507 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num, in dcss_dpr_format_set() argument
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H A Ddcss-scaler.c362 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en) in dcss_scaler_ch_enable() argument
364 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_ch_enable()
576 int dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num, in dcss_scaler_get_min_max_ratios() argument
579 *min = upscale_fp(dcss_scaler_factors[ch_num].upscale, 16); in dcss_scaler_get_min_max_ratios()
580 *max = downscale_fp(dcss_scaler_factors[ch_num].downscale, 16); in dcss_scaler_get_min_max_ratios()
775 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num, in dcss_scaler_set_filter() argument
778 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_set_filter()
783 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num, in dcss_scaler_setup() argument
788 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_setup()
H A Ddcss-kms.h14 int ch_num; member
/openbmc/linux/drivers/hwmon/
H A Dpowr1220.c107 static int powr1220_read_adc(struct device *dev, int ch_num) in powr1220_read_adc() argument
116 if (time_after(jiffies, data->adc_last_updated[ch_num] + HZ) || in powr1220_read_adc()
117 !data->adc_valid[ch_num]) { in powr1220_read_adc()
124 if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV || in powr1220_read_adc()
125 data->adc_maxes[ch_num] == 0) in powr1220_read_adc()
130 adc_range | ch_num); in powr1220_read_adc()
156 data->adc_values[ch_num] = reading; in powr1220_read_adc()
157 data->adc_valid[ch_num] = true; in powr1220_read_adc()
158 data->adc_last_updated[ch_num] = jiffies; in powr1220_read_adc()
161 if (reading > data->adc_maxes[ch_num]) in powr1220_read_adc()
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H A Dmr75203.c633 u32 vm_num, u32 ch_num, u8 *vm_idx) in pvt_get_active_channel() argument
645 memset(vm_active_ch, ch_num, vm_num); in pvt_get_active_channel()
646 pvt->vm_channels.max = ch_num; in pvt_get_active_channel()
647 pvt->vm_channels.total = ch_num * vm_num; in pvt_get_active_channel()
650 if (vm_active_ch[i] > ch_num) { in pvt_get_active_channel()
769 u32 ts_num, vm_num, pd_num, ch_num, val, index, i; in mr75203_probe() local
808 ch_num = (val & CH_NUM_MSK) >> CH_NUM_SFT; in mr75203_probe()
878 ret = pvt_get_active_channel(dev, pvt, vm_num, ch_num, vm_idx); in mr75203_probe()
/openbmc/linux/drivers/input/misc/
H A Diqs269a.c293 unsigned int ch_num; member
299 unsigned int ch_num, unsigned int mode) in iqs269_ati_mode_set() argument
304 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_mode_set()
312 engine_a = be16_to_cpu(ch_reg[ch_num].engine_a); in iqs269_ati_mode_set()
317 ch_reg[ch_num].engine_a = cpu_to_be16(engine_a); in iqs269_ati_mode_set()
326 unsigned int ch_num, unsigned int *mode) in iqs269_ati_mode_get() argument
331 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_mode_get()
335 engine_a = be16_to_cpu(ch_reg[ch_num].engine_a); in iqs269_ati_mode_get()
345 unsigned int ch_num, unsigned int base) in iqs269_ati_base_set() argument
350 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_base_set()
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/openbmc/linux/drivers/bus/mhi/host/
H A Dpci_generic.c53 #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ argument
55 .num = ch_num, \
68 #define MHI_CHANNEL_CONFIG_DL(ch_num, ch_name, el_count, ev_ring) \ argument
70 .num = ch_num, \
83 #define MHI_CHANNEL_CONFIG_DL_AUTOQUEUE(ch_num, ch_name, el_count, ev_ring) \ argument
85 .num = ch_num, \
112 #define MHI_CHANNEL_CONFIG_HW_UL(ch_num, ch_name, el_count, ev_ring) \ argument
114 .num = ch_num, \
127 #define MHI_CHANNEL_CONFIG_HW_DL(ch_num, ch_name, el_count, ev_ring) \ argument
129 .num = ch_num, \
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/openbmc/linux/sound/soc/amd/
H A Dacp-pcm-dma.c132 static void config_acp_dma_channel(void __iomem *acp_mmio, u8 ch_num, in config_acp_dma_channel() argument
139 dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num); in config_acp_dma_channel()
141 acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num); in config_acp_dma_channel()
146 acp_mmio, mmACP_DMA_DSCR_STRT_IDX_0 + ch_num); in config_acp_dma_channel()
153 acp_mmio, mmACP_DMA_DSCR_CNT_0 + ch_num); in config_acp_dma_channel()
156 acp_reg_write(priority_level, acp_mmio, mmACP_DMA_PRIO_0 + ch_num); in config_acp_dma_channel()
180 static void pre_config_reset(void __iomem *acp_mmio, u16 ch_num) in pre_config_reset() argument
186 dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num); in pre_config_reset()
188 acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num); in pre_config_reset()
190 ret = readl_poll_timeout(acp_mmio + ((mmACP_DMA_CNTL_0 + ch_num) * 4), in pre_config_reset()
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/openbmc/linux/sound/drivers/
H A Dpcmtest.c174 short ch_num; in check_buf_block_i() local
181 ch_num = (v_iter->total_bytes / v_iter->sample_bytes) % runtime->channels; in check_buf_block_i()
182 if (current_byte != patt_bufs[ch_num].buf[ch_pos_i(v_iter->total_bytes, in check_buf_block_i()
185 % patt_bufs[ch_num].len]) { in check_buf_block_i()
199 short ch_num; in check_buf_block_ni() local
203 ch_num = i % channels; in check_buf_block_ni()
204 current_byte = runtime->dma_area[buf_pos_n(v_iter, channels, ch_num)]; in check_buf_block_ni()
207 if (current_byte != patt_bufs[ch_num].buf[(v_iter->total_bytes / channels) in check_buf_block_ni()
208 % patt_bufs[ch_num].len]) { in check_buf_block_ni()
242 short ch_num; in fill_block_pattern_n() local
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/openbmc/linux/drivers/most/
H A Dmost_snd.c416 static int split_arg_list(char *buf, u16 *ch_num, char **sample_res) in split_arg_list() argument
424 ret = kstrtou16(num, 0, ch_num); in split_arg_list()
449 u16 ch_num, char *sample_res, in audio_set_hw_params() argument
462 if (!ch_num) { in audio_set_hw_params()
467 if (cfg->subbuffer_size != ch_num * sinfo[i].bytes) { in audio_set_hw_params()
481 pcm_hw->channels_min = ch_num; in audio_set_hw_params()
482 pcm_hw->channels_max = ch_num; in audio_set_hw_params()
524 u16 ch_num; in audio_probe_channel() local
533 ret = split_arg_list(arg_list_cpy, &ch_num, &sample_res); in audio_probe_channel()
589 ret = audio_set_hw_params(&channel->pcm_hardware, ch_num, sample_res, in audio_probe_channel()
/openbmc/linux/drivers/rapidio/
H A Drio_cm.c224 static struct rio_channel *riocm_ch_alloc(u16 ch_num);
1281 static struct rio_channel *riocm_ch_alloc(u16 ch_num) in riocm_ch_alloc() argument
1291 if (ch_num) { in riocm_ch_alloc()
1293 start = ch_num; in riocm_ch_alloc()
1294 end = ch_num + 1; in riocm_ch_alloc()
1344 static struct rio_channel *riocm_ch_create(u16 *ch_num) in riocm_ch_create() argument
1348 ch = riocm_ch_alloc(*ch_num); in riocm_ch_create()
1352 *ch_num, PTR_ERR(ch)); in riocm_ch_create()
1354 *ch_num = ch->id; in riocm_ch_create()
1659 u16 ch_num; in cm_chan_create() local
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/openbmc/linux/drivers/dma/ti/
H A Dedma.c220 int ch_num;
392 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_set_chmap()
403 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_setup_interrupt()
548 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_start()
575 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_stop()
601 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_pause()
611 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_resume()
621 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_trigger_channel()
634 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_clean_channel()
653 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_assign_channel_eventq()
221 int ch_num; global() member
1905 edma_is_memcpy_channel(int ch_num,s32 * memcpy_channels) edma_is_memcpy_channel() argument
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v8_10.h55 #define SWIZZLE_MODE_TMP_ADDR(na, ch_num, ch_idx) \ argument
56 ((((na) >> 10) * (ch_num) + (ch_idx)) << 10)
/openbmc/linux/include/uapi/linux/
H A Drio_cm_cdev.h52 __u16 ch_num; member
59 __u16 ch_num; member
/openbmc/linux/drivers/i2c/busses/
H A Di2c-eg20t.c162 int ch_num; member
629 for (i = 0, flag = 0; i < adap_info->ch_num; i++) { in pch_i2c_handler()
766 adap_info->ch_num = id->driver_data; in pch_i2c_probe()
768 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_probe()
794 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_probe()
833 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_remove()
841 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_remove()
859 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_suspend()
867 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_suspend()
883 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_resume()
/openbmc/u-boot/arch/arm/mach-rockchip/
H A Dsdram_common.c22 u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT) in rockchip_sdram_size() local
26 for (ch = 0; ch < ch_num; ch++) { in rockchip_sdram_size()
/openbmc/linux/drivers/pci/endpoint/functions/
H A Dpci-epf-mhi.c34 #define MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, direction) \ argument
36 .num = ch_num, \
41 #define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ argument
42 MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_TO_DEVICE)
44 #define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ argument
45 MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_FROM_DEVICE)
/openbmc/linux/drivers/dma/
H A Dmoxart-dma.c140 int ch_num; member
351 __func__, ch->ch_num); in moxart_alloc_chan_resources()
364 __func__, ch->ch_num); in moxart_free_chan_resources()
594 ch->ch_num = i; in moxart_probe()
602 __func__, i, ch->ch_num, ch->base); in moxart_probe()
/openbmc/linux/drivers/net/ethernet/ti/
H A Dcpsw_ethtool.c238 static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) in cpsw_add_ch_strings() argument
244 ch_stats_len = CPSW_STATS_CH_LEN * ch_num; in cpsw_add_ch_strings()
534 static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx, in cpsw_update_channels_res() argument
553 while (*ch < ch_num) { in cpsw_update_channels_res()
570 while (*ch > ch_num) { in cpsw_update_channels_res()
/openbmc/linux/arch/sh/include/asm/
H A Ddma.h101 int ch_num; member

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