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Searched refs:ch (Results 1 – 25 of 349) sorted by relevance

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/openbmc/qemu/hw/misc/macio/
H A Dmac_dbdma.c59 #define DBDMA_DPRINTFCH(ch, fmt, ...) do { \ argument
61 if ((1ul << (ch)->channel) & DEBUG_DBDMA_CHANMASK) { \
62 printf("DBDMA[%02x]: " fmt , (ch)->channel, ## __VA_ARGS__); \
70 static DBDMAState *dbdma_from_ch(DBDMA_channel *ch) in dbdma_from_ch() argument
72 return container_of(ch, DBDMAState, channels[ch->channel]); in dbdma_from_ch()
76 static void dump_dbdma_cmd(DBDMA_channel *ch, dbdma_cmd *cmd) in dump_dbdma_cmd() argument
78 DBDMA_DPRINTFCH(ch, "dbdma_cmd %p\n", cmd); in dump_dbdma_cmd()
79 DBDMA_DPRINTFCH(ch, " req_count 0x%04x\n", le16_to_cpu(cmd->req_count)); in dump_dbdma_cmd()
80 DBDMA_DPRINTFCH(ch, " command 0x%04x\n", le16_to_cpu(cmd->command)); in dump_dbdma_cmd()
81 DBDMA_DPRINTFCH(ch, " phy_addr 0x%08x\n", le32_to_cpu(cmd->phy_addr)); in dump_dbdma_cmd()
[all …]
/openbmc/qemu/hw/dma/
H A Domap_dma.c122 struct omap_dma_channel_s ch[32]; member
143 static void omap_dma_channel_load(struct omap_dma_channel_s *ch) in omap_dma_channel_load() argument
145 struct omap_dma_reg_set_s *a = &ch->active_set; in omap_dma_channel_load()
147 int omap_3_1 = !ch->omap_3_1_compatible_disable; in omap_dma_channel_load()
154 a->src = ch->addr[0]; in omap_dma_channel_load()
155 a->dest = ch->addr[1]; in omap_dma_channel_load()
156 a->frames = ch->frames; in omap_dma_channel_load()
157 a->elements = ch->elements; in omap_dma_channel_load()
158 a->pck_elements = ch->frame_index[!ch->src_sync]; in omap_dma_channel_load()
163 if (unlikely(!ch->elements || !ch->frames)) { in omap_dma_channel_load()
[all …]
H A Dsoc_dma.c25 static void transfer_mem2mem(struct soc_dma_ch_s *ch) in transfer_mem2mem() argument
27 memcpy(ch->paddr[0], ch->paddr[1], ch->bytes); in transfer_mem2mem()
28 ch->paddr[0] += ch->bytes; in transfer_mem2mem()
29 ch->paddr[1] += ch->bytes; in transfer_mem2mem()
32 static void transfer_mem2fifo(struct soc_dma_ch_s *ch) in transfer_mem2fifo() argument
34 ch->io_fn[1](ch->io_opaque[1], ch->paddr[0], ch->bytes); in transfer_mem2fifo()
35 ch->paddr[0] += ch->bytes; in transfer_mem2fifo()
38 static void transfer_fifo2mem(struct soc_dma_ch_s *ch) in transfer_fifo2mem() argument
40 ch->io_fn[0](ch->io_opaque[0], ch->paddr[1], ch->bytes); in transfer_fifo2mem()
41 ch->paddr[1] += ch->bytes; in transfer_fifo2mem()
[all …]
H A Dsifive_pdma.c71 static void sifive_pdma_run(SiFivePDMAState *s, int ch) in sifive_pdma_run() argument
73 uint64_t bytes = s->chan[ch].next_bytes; in sifive_pdma_run()
74 uint64_t dst = s->chan[ch].next_dst; in sifive_pdma_run()
75 uint64_t src = s->chan[ch].next_src; in sifive_pdma_run()
76 uint32_t config = s->chan[ch].next_config; in sifive_pdma_run()
112 s->chan[ch].state = DMA_CHAN_STATE_STARTED; in sifive_pdma_run()
113 s->chan[ch].control &= ~CONTROL_DONE; in sifive_pdma_run()
114 s->chan[ch].control &= ~CONTROL_ERR; in sifive_pdma_run()
117 s->chan[ch].exec_config = config; in sifive_pdma_run()
118 s->chan[ch].exec_bytes = bytes; in sifive_pdma_run()
[all …]
H A Dbcm2835_dma.c58 BCM2835DMAChan *ch = &s->chan[c]; in bcm2835_dma_update() local
66 while ((s->enable & (1 << c)) && (ch->conblk_ad != 0)) { in bcm2835_dma_update()
68 ch->ti = ldl_le_phys(&s->dma_as, ch->conblk_ad); in bcm2835_dma_update()
69 ch->source_ad = ldl_le_phys(&s->dma_as, ch->conblk_ad + 4); in bcm2835_dma_update()
70 ch->dest_ad = ldl_le_phys(&s->dma_as, ch->conblk_ad + 8); in bcm2835_dma_update()
71 ch->txfr_len = ldl_le_phys(&s->dma_as, ch->conblk_ad + 12); in bcm2835_dma_update()
72 ch->stride = ldl_le_phys(&s->dma_as, ch->conblk_ad + 16); in bcm2835_dma_update()
73 ch->nextconbk = ldl_le_phys(&s->dma_as, ch->conblk_ad + 20); in bcm2835_dma_update()
76 if (ch->ti & BCM2708_DMA_TDMODE) { in bcm2835_dma_update()
78 ylen += (ch->txfr_len >> 16) & 0x3fff; in bcm2835_dma_update()
[all …]
H A Dpl330.c590 static inline void pl330_fault(PL330Chan *ch, uint32_t flags)
592 trace_pl330_fault(ch, flags); in pl330_fault() argument
593 ch->fault_type |= flags; in pl330_fault()
594 if (ch->state == pl330_chan_fault) { in pl330_fault()
597 ch->state = pl330_chan_fault; in pl330_fault()
598 ch->parent->num_faulting++; in pl330_fault()
599 if (ch->parent->num_faulting == 1) { in pl330_fault()
601 qemu_irq_raise(ch->parent->irq_abort); in pl330_fault()
615 static void pl330_dmaadxh(PL330Chan *ch, uint8_t *args, bool ra, bool neg)
622 if (ch in pl330_dmaadxh()
617 pl330_dmaadxh(PL330Chan * ch,uint8_t * args,bool ra,bool neg) pl330_dmaadxh() argument
635 pl330_dmaaddh(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmaaddh() argument
640 pl330_dmaadnh(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmaadnh() argument
645 pl330_dmaend(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmaend() argument
667 pl330_dmaflushp(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmaflushp() argument
688 pl330_dmago(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmago() argument
727 pl330_dmald(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmald() argument
757 pl330_dmaldp(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmaldp() argument
777 pl330_dmalp(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmalp() argument
784 pl330_dmakill(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmakill() argument
803 pl330_dmalpend(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmalpend() argument
835 pl330_dmamov(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmamov() argument
862 pl330_dmanop(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmanop() argument
868 pl330_dmarmb(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmarmb() argument
879 pl330_dmasev(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmasev() argument
905 pl330_dmast(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmast() argument
931 pl330_dmastp(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmastp() argument
952 pl330_dmastz(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmastz() argument
968 pl330_dmawfe(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmawfe() argument
1008 pl330_dmawfp(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmawfp() argument
1053 pl330_dmawmb(PL330Chan * ch,uint8_t opcode,uint8_t * args,int len) pl330_dmawmb() argument
1101 pl330_fetch_insn(PL330Chan * ch) pl330_fetch_insn() argument
1116 pl330_exec_insn(PL330Chan * ch,const PL330InsnDesc * insn) pl330_exec_insn() argument
1126 pl330_update_pc(PL330Chan * ch,const PL330InsnDesc * insn) pl330_update_pc() argument
1134 pl330_chan_exec(PL330Chan * ch) pl330_chan_exec() argument
1299 PL330Chan *ch; pl330_debug_exec() local
1516 pl330_chan_reset(PL330Chan * ch) pl330_chan_reset() argument
[all...]
H A Dpl080.c95 pl080_channel *ch; in pl080_run() local
126 ch = &s->chan[c]; in pl080_run()
129 if ((ch->conf & (PL080_CCONF_H | PL080_CCONF_E)) in pl080_run()
132 flow = (ch->conf >> 11) & 7; in pl080_run()
137 src_id = (ch->conf >> 1) & 0x1f; in pl080_run()
138 dest_id = (ch->conf >> 6) & 0x1f; in pl080_run()
139 size = ch->ctrl & 0xfff; in pl080_run()
165 swidth = 1 << ((ch->ctrl >> 18) & 7); in pl080_run()
166 dwidth = 1 << ((ch->ctrl >> 21) & 7); in pl080_run()
168 address_space_read(&s->downstream_as, ch->src, in pl080_run()
[all …]
/openbmc/u-boot/arch/x86/cpu/quark/
H A Dsmc.c255 uint8_t ch; /* channel counter */ in ddrphy_init() local
279 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
280 if (mrc_params->channel_enables & (1 << ch)) { in ddrphy_init()
283 CMDPMCONFIG0 + ch * DDRIOCCC_CH_OFFSET, in ddrphy_init()
287 CMDCFGREG0 + ch * DDRIOCCC_CH_OFFSET, in ddrphy_init()
291 CMDPTRREG + ch * DDRIOCCC_CH_OFFSET, in ddrphy_init()
303 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
304 if (mrc_params->channel_enables & (1 << ch)) { in ddrphy_init()
313 ch * DDRIODQ_CH_OFFSET, in ddrphy_init()
336 ch * DDRIODQ_CH_OFFSET, in ddrphy_init()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_common.h34 #define SYS_REG_ROW_3_4_SHIFT(ch) (30 + (ch)) argument
36 #define SYS_REG_CHINFO_SHIFT(ch) (28 + (ch)) argument
37 #define SYS_REG_RANK_SHIFT(ch) (11 + (ch) * 16) argument
39 #define SYS_REG_COL_SHIFT(ch) (9 + (ch) * 16) argument
41 #define SYS_REG_BK_SHIFT(ch) (8 + (ch) * 16) argument
43 #define SYS_REG_CS0_ROW_SHIFT(ch) (6 + (ch) * 16) argument
45 #define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16) argument
47 #define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16) argument
49 #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) argument
/openbmc/qemu/hw/char/
H A Dipoctal232.c123 SCC2698Channel ch[N_CHANNELS];
161 VMSTATE_STRUCT_ARRAY(ch, IPOctalState, N_CHANNELS, 1,
194 SCC2698Channel *ch = &dev->ch[channel]; in write_cr()
202 ch->rx_enabled = true; in write_cr()
206 ch->rx_enabled = false; in write_cr()
210 ch->sr |= SR_TXRDY | SR_TXEMT; in write_cr()
215 ch->sr &= ~(SR_TXRDY | SR_TXEMT); in write_cr()
228 ch->mr_idx = 0; in write_cr()
232 ch in write_cr()
120 SCC2698Channel ch[N_CHANNELS]; global() member
195 SCC2698Channel *ch = &dev->ch[channel]; write_cr() local
269 SCC2698Channel *ch = &dev->ch[channel]; io_read() local
335 SCC2698Channel *ch = &dev->ch[channel]; io_write() local
471 SCC2698Channel *ch = opaque; hostdev_can_receive() local
478 SCC2698Channel *ch = opaque; hostdev_receive() local
509 SCC2698Channel *ch = opaque; hostdev_event() local
546 SCC2698Channel *ch = &s->ch[i]; ipoctal_realize() local
[all...]
/openbmc/qemu/hw/timer/
H A Drenesas_tmr.c63 static void update_events(RTMRState *tmr, int ch) in update_events() argument
69 if (tmr->tccr[ch] == 0) { in update_events()
72 if (FIELD_EX8(tmr->tccr[ch], TCCR, CSS) == 0) { in update_events()
79 if (ch == 1) { in update_events()
80 tmr->next[ch] = none; in update_events()
88 diff[cmia] = tmr->tcora[ch] - tmr->tcnt[ch]; in update_events()
89 diff[cmib] = tmr->tcorb[ch] - tmr->tcnt[ch]; in update_events()
90 diff[ovi] = 0x100 - tmr->tcnt[ch]; in update_events()
99 tmr->next[ch] = event; in update_events()
101 next_time *= clkdiv[FIELD_EX8(tmr->tccr[ch], TCCR, CKS)]; in update_events()
[all …]
H A Drenesas_cmt.c54 static void update_events(RCMTState *cmt, int ch) in update_events() argument
58 if ((cmt->cmstr & (1 << ch)) == 0) { in update_events()
62 next_time = cmt->cmcor[ch] - cmt->cmcnt[ch]; in update_events()
72 next_time *= 1 << (3 + FIELD_EX16(cmt->cmcr[ch], CMCR, CKS) * 2); in update_events()
74 timer_mod(&cmt->timer[ch], next_time); in update_events()
77 static int64_t read_cmcnt(RCMTState *cmt, int ch) in read_cmcnt() argument
81 if (cmt->cmstr & (1 << ch)) { in read_cmcnt()
82 delta = (now - cmt->tick[ch]); in read_cmcnt()
85 delta /= 1 << (3 + FIELD_EX16(cmt->cmcr[ch], CMCR, CKS) * 2); in read_cmcnt()
86 cmt->tick[ch] = now; in read_cmcnt()
[all …]
/openbmc/u-boot/lib/
H A Dcharset.c31 s32 ch = 0; in get_code() local
33 ch = read_u8(data); in get_code()
34 if (!ch) in get_code()
36 if (ch >= 0xc2 && ch <= 0xf4) { in get_code()
39 if (ch >= 0xe0) { in get_code()
40 if (ch >= 0xf0) { in get_code()
42 ch &= 0x07; in get_code()
43 code = ch << 18; in get_code()
44 ch = read_u8(data); in get_code()
45 if (ch < 0x80 || ch > 0xbf) in get_code()
[all …]
H A Dtiny-printf.c22 void (*putc)(struct printf_info *info, char ch);
53 char ch; in string() local
55 while ((ch = *s++)) in string()
56 out(info, ch); in string()
200 char ch; in _vprintf() local
206 while ((ch = *(fmt++))) { in _vprintf()
207 if (ch != '%') { in _vprintf()
208 info->putc(info, ch); in _vprintf()
214 ch = *(fmt++); in _vprintf()
215 if (ch == '-') in _vprintf()
[all …]
/openbmc/bmcweb/redfish-core/include/utils/
H A Dhex_utils.hpp25 inline uint8_t hexCharToNibble(char ch) in hexCharToNibble() argument
28 if (ch >= '0' && ch <= '9') in hexCharToNibble()
30 rc = static_cast<uint8_t>(ch) - '0'; in hexCharToNibble()
32 else if (ch >= 'A' && ch <= 'F') in hexCharToNibble()
34 rc = static_cast<uint8_t>(ch - 'A') + 10U; in hexCharToNibble()
36 else if (ch >= 'a' && ch <= 'f') in hexCharToNibble()
38 rc = static_cast<uint8_t>(ch - 'a') + 10U; in hexCharToNibble()
/openbmc/phosphor-logging/test/openpower-pels/
H A Devent_logger_test.cpp55 CreateHelper ch; in TEST() local
58 std::mem_fn(&CreateHelper::create), &ch, std::placeholders::_1, in TEST()
61 ch._eventLogger = &eventLogger; in TEST()
73 EXPECT_EQ(ch._prevName, "one"); in TEST()
74 EXPECT_EQ(ch._prevLevel, Entry::Level::Error); in TEST()
75 EXPECT_EQ(ch._prevAD, ad.getData()); in TEST()
76 EXPECT_EQ(ch._createCount, 1); in TEST()
86 EXPECT_EQ(ch._createCount, 2); in TEST()
87 EXPECT_EQ(ch._prevName, "two"); in TEST()
91 EXPECT_EQ(ch._createCount, 3); in TEST()
[all …]
/openbmc/u-boot/common/
H A Dkgdb.c118 hex(unsigned char ch) in hex() argument
120 if (ch >= 'a' && ch <= 'f') in hex()
121 return ch-'a'+10; in hex()
122 if (ch >= '0' && ch <= '9') in hex()
123 return ch-'0'; in hex()
124 if (ch >= 'A' && ch <= 'F') in hex()
125 return ch-'A'+10; in hex()
136 unsigned char ch; in mem2hex() local
148 ch = *tmp++; in mem2hex()
149 *buf++ = hexchars[ch >> 4]; in mem2hex()
[all …]
/openbmc/qemu/net/can/
H A Dcan_host.c37 static void can_host_disconnect(CanHostState *ch) in can_host_disconnect() argument
39 CanHostClass *chc = CAN_HOST_GET_CLASS(ch); in can_host_disconnect()
41 can_bus_remove_client(&ch->bus_client); in can_host_disconnect()
42 chc->disconnect(ch); in can_host_disconnect()
45 static void can_host_connect(CanHostState *ch, Error **errp) in can_host_connect() argument
47 CanHostClass *chc = CAN_HOST_GET_CLASS(ch); in can_host_connect()
50 if (ch->bus == NULL) { in can_host_connect()
55 chc->connect(ch, &local_err); in can_host_connect()
61 can_bus_insert_client(ch->bus, &ch->bus_client); in can_host_connect()
/openbmc/u-boot/include/
H A Dhexdump.h37 static inline int hex_to_bin(char ch) in hex_to_bin() argument
39 if ((ch >= '0') && (ch <= '9')) in hex_to_bin()
40 return ch - '0'; in hex_to_bin()
41 ch = tolower(ch); in hex_to_bin()
42 if ((ch >= 'a') && (ch <= 'f')) in hex_to_bin()
43 return ch - 'a' + 10; in hex_to_bin()
/openbmc/u-boot/arch/arm/mach-rockchip/
H A Dsdram_common.c19 u32 ch; in rockchip_sdram_size() local
26 for (ch = 0; ch < ch_num; ch++) { in rockchip_sdram_size()
27 rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) & in rockchip_sdram_size()
29 col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK); in rockchip_sdram_size()
30 bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK); in rockchip_sdram_size()
31 cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) & in rockchip_sdram_size()
33 cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) & in rockchip_sdram_size()
35 bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) & in rockchip_sdram_size()
37 row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) & in rockchip_sdram_size()
/openbmc/u-boot/drivers/clk/uniphier/
H A Dclk-uniphier-mio.c19 #define UNIPHIER_MIO_CLK_SD(_id, ch) \ argument
35 .reg = 0x30 + 0x200 * (ch), \
58 UNIPHIER_CLK_GATE((_id), (_id) + 32, 0x20 + 0x200 * (ch), 8)
60 #define UNIPHIER_MIO_CLK_USB2(id, ch) \ argument
61 UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 28)
63 #define UNIPHIER_MIO_CLK_USB2_PHY(id, ch) \ argument
64 UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 29)
/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Dclk-ld11.c37 int ch; in uniphier_ld11_clk_init() local
39 for (ch = 0; ch < 3; ch++) { in uniphier_ld11_clk_init()
42 writel(0x82280600, phyctrl + 8 * ch); in uniphier_ld11_clk_init()
43 writel(0x00000106, phyctrl + 8 * ch + 4); in uniphier_ld11_clk_init()
/openbmc/u-boot/drivers/serial/
H A Dserial_efi.c51 int ret, ch; in serial_efi_getc() local
58 ch = priv->key.unicode_char; in serial_efi_getc()
65 if (!ch && priv->key.scan_code == 8) in serial_efi_getc()
66 ch = 8; in serial_efi_getc()
67 debug(" [%x %x %x] ", ch, priv->key.unicode_char, priv->key.scan_code); in serial_efi_getc()
69 return ch; in serial_efi_getc()
72 static int serial_efi_putc(struct udevice *dev, const char ch) in serial_efi_putc() argument
78 ucode[0] = ch; in serial_efi_putc()
113 static inline void _debug_uart_putc(int ch) in _debug_uart_putc() argument
118 ucode[0] = ch; in _debug_uart_putc()
/openbmc/u-boot/board/freescale/ls1021aqds/
H A Ddcu.c18 static int select_i2c_ch_pca9547(u8 ch) in select_i2c_ch_pca9547() argument
22 ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); in select_i2c_ch_pca9547()
49 u8 ch; in platform_dcu_init() local
53 1, &ch, 1); in platform_dcu_init()
59 ch &= 0x1F; in platform_dcu_init()
60 ch |= 0xA0; in platform_dcu_init()
62 1, &ch, 1); in platform_dcu_init()
/openbmc/u-boot/drivers/video/
H A Dipu_regs.h311 #define IPU_CHA_DB_MODE_SEL(ch) (&IPU_CM_REG->ch_db_mode_sel[ch / 32]) argument
316 #define IPU_CHA_CUR_BUF(ch) (&IPU_STAT->cur_buf[ch / 32]) argument
317 #define IPU_CHA_BUF0_RDY(ch) (&IPU_STAT->ch_buf0_rdy[ch / 32]) argument
318 #define IPU_CHA_BUF1_RDY(ch) (&IPU_STAT->ch_buf1_rdy[ch / 32]) argument
327 #define IDMAC_CHA_EN(ch) (&IDMAC_REG->ch_en[ch / 32]) argument
328 #define IDMAC_CHA_PRI(ch) (&IDMAC_REG->ch_pri[ch / 32]) argument
363 static inline struct ipu_dc_ch *dc_ch_offset(int ch) in dc_ch_offset() argument
365 switch (ch) { in dc_ch_offset()
369 return &DC_REG->dc_ch0_1_2[ch]; in dc_ch_offset()
372 return &DC_REG->dc_ch5_6[ch - 5]; in dc_ch_offset()
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