| /openbmc/linux/drivers/clk/pxa/ |
| H A D | clk-pxa27x.c | 105 unsigned long ccsr = readl(clk_regs + CCSR); in pxa27x_is_ppll_disabled() local
107 return ccsr & (1 << CCCR_PPDIS_BIT); in pxa27x_is_ppll_disabled()
213 l = ccsr & CCSR_L_MASK; in clk_pxa27x_cpll_get_rate()
255 l = ccsr & CCSR_L_MASK; in clk_pxa27x_lcd_base_get_rate()
256 osc_forced = ccsr & (1 << CCCR_CPDIS_BIT); in clk_pxa27x_lcd_base_get_rate()
276 osc_forced = ccsr & (1 << CCCR_CPDIS_BIT); in clk_pxa27x_lcd_base_get_parent()
305 osc_forced = ccsr & (1 << CCCR_CPDIS_BIT); in clk_pxa27x_core_get_parent()
365 osc_forced = ccsr & (1 << CCCR_CPDIS_BIT); in clk_pxa27x_system_bus_get_rate()
382 osc_forced = ccsr & (1 << CCCR_CPDIS_BIT); in clk_pxa27x_system_bus_get_parent()
399 osc_forced = ccsr & (1 << CCCR_CPDIS_BIT); in clk_pxa27x_memory_get_rate()
[all …]
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| /openbmc/u-boot/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 235 u32 ccsr = readl(&mxc_ccm->ccsr); in get_lp_apm() local
237 if (ccsr & MXC_CCM_CCSR_LP_APM) in get_lp_apm()
647 u32 ccsr = readl(&mxc_ccm->ccsr); in config_pll_clk() local
654 &mxc_ccm->ccsr); in config_pll_clk()
660 &mxc_ccm->ccsr); in config_pll_clk()
665 &mxc_ccm->ccsr); in config_pll_clk()
671 &mxc_ccm->ccsr); in config_pll_clk()
676 &mxc_ccm->ccsr); in config_pll_clk()
682 &mxc_ccm->ccsr); in config_pll_clk()
688 &mxc_ccm->ccsr); in config_pll_clk()
[all …]
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| /openbmc/linux/drivers/net/wireless/intersil/orinoco/ |
| H A D | spectrum_cs.c | 81 u8 ccsr; in spectrum_reset() local
100 ret = pcmcia_read_config_byte(link, CISREG_CCSR, &ccsr); in spectrum_reset()
108 ccsr = (idle ? HCR_IDLE : HCR_RUN) | (ccsr & HCR_MEM16); in spectrum_reset()
109 ret = pcmcia_write_config_byte(link, CISREG_CCSR, ccsr); in spectrum_reset()
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| /openbmc/linux/arch/powerpc/sysdev/ |
| H A D | fsl_rio.c | 396 static inline void fsl_rio_info(struct device *dev, u32 ccsr) in fsl_rio_info() argument
399 if (ccsr & 1) { in fsl_rio_info()
401 switch (ccsr >> 30) { in fsl_rio_info()
414 switch ((ccsr >> 27) & 7) { in fsl_rio_info()
431 if (!(ccsr & 0x80000000)) in fsl_rio_info()
433 if (!(ccsr & 0x08000000)) in fsl_rio_info()
455 u32 ccsr; in fsl_rio_setup() local
625 ccsr = in_be32(priv->regs_win + RIO_CCSR + i*0x20); in fsl_rio_setup()
652 fsl_rio_info(&dev->dev, ccsr); in fsl_rio_setup()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | ppce500.c | 422 PPCE500CCSRState *ccsr = CCSR(container_get(qdev_get_machine(), in e500_pcihost_bridge_realize() local
425 memory_region_init_alias(&b->bar0, OBJECT(ccsr), "e500-pci-bar0", &ccsr->ccsr_space, in e500_pcihost_bridge_realize()
426 0, int128_get64(ccsr->ccsr_space.size)); in e500_pcihost_bridge_realize()
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| /openbmc/qemu/hw/ppc/ |
| H A D | e500.c | 864 MemoryRegion *ccsr, in ppce500_init_mpic() argument
889 memory_region_add_subregion(ccsr, MPC8544_MPIC_REGS_OFFSET, in ppce500_init_mpic()
935 PPCE500CCSRState *ccsr; in ppce500_init() local
999 ccsr = CCSR(dev); in ppce500_init()
1000 ccsr_addr_space = &ccsr->ccsr_space; in ppce500_init()
1284 PPCE500CCSRState *ccsr = CCSR(obj); in e500_ccsr_initfn() local
1285 memory_region_init(&ccsr->ccsr_space, obj, "e500-ccsr", in e500_ccsr_initfn()
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| /openbmc/u-boot/arch/arm/include/asm/arch-armada100/ |
| H A D | cpu.h | 45 u32 ccsr; /* 0x00C */ member
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| /openbmc/u-boot/board/armadeus/apf27/ |
| H A D | fpga.c | 198 writel(ACFG_CCSR_VAL, &pll->ccsr); in apf27_fpga_setup()
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| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | clock.c | 1429 reg = readl(&mxc_ccm->ccsr); in select_ldb_di_clock_source()
1431 writel(reg, &mxc_ccm->ccsr); in select_ldb_di_clock_source()
1456 reg = readl(&mxc_ccm->ccsr); in select_ldb_di_clock_source()
1458 writel(reg, &mxc_ccm->ccsr); in select_ldb_di_clock_source()
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | b4420si-pre.dtsi | 46 ccsr = &soc;
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| H A D | t102xsi-pre.dtsi | 45 ccsr = &soc;
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| H A D | b4860si-pre.dtsi | 46 ccsr = &soc;
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| H A D | p5020si-pre.dtsi | 46 ccsr = &soc;
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| H A D | t208xsi-pre.dtsi | 45 ccsr = &soc;
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| H A D | t104xsi-pre.dtsi | 45 ccsr = &soc;
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| H A D | p3041si-pre.dtsi | 46 ccsr = &soc;
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| H A D | p2041si-pre.dtsi | 46 ccsr = &soc;
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| H A D | p5040si-pre.dtsi | 46 ccsr = &soc;
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| H A D | p4080si-pre.dtsi | 46 ccsr = &soc;
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| H A D | t4240si-pre.dtsi | 46 ccsr = &soc;
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| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | crm_regs.h | 17 u32 ccsr; member
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| /openbmc/u-boot/arch/arm/cpu/armv7/vf610/ |
| H A D | generic.c | 45 ccm_ccsr = readl(&ccm->ccsr); in get_mcu_main_clk()
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| /openbmc/u-boot/board/freescale/vf610twr/ |
| H A D | vf610twr.c | 303 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, in clock_init()
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | asm-offsets.c | 155 DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr)); in main()
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| /openbmc/u-boot/board/toradex/colibri_vf/ |
| H A D | colibri_vf.c | 447 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, pfd_clk_sel | in clock_init()
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