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Searched refs:c6 (Results 1 – 25 of 84) sorted by relevance

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/openbmc/linux/arch/arm/mm/
H A Dproc-arm940.S280 mcr p15, 0, r0, c6, c4, 0
281 mcr p15, 0, r0, c6, c5, 0
282 mcr p15, 0, r0, c6, c6, 0
283 mcr p15, 0, r0, c6, c7, 0
286 mcr p15, 0, r0, c6, c4, 1
287 mcr p15, 0, r0, c6, c5, 1
288 mcr p15, 0, r0, c6, c6, 1
289 mcr p15, 0, r0, c6, c7, 1
293 mcr p15, 0, r0, c6, c0, 1
299 mcr p15, 0, r3, c6, c1, 1
[all …]
H A Dproc-arm740.S64 mcr p15, 0, r0, c6, c3 @ disable area 3~7
65 mcr p15, 0, r0, c6, c4
66 mcr p15, 0, r0, c6, c5
67 mcr p15, 0, r0, c6, c6
68 mcr p15, 0, r0, c6, c7
71 mcr p15, 0, r0, c6, c0 @ set area 0, default
81 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
94 2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
H A Dproc-arm946.S58 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
103 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
137 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
140 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
277 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
333 mcr p15, 0, r0, c6, c4, 0
334 mcr p15, 0, r0, c6, c5, 0
335 mcr p15, 0, r0, c6, c6, 0
336 mcr p15, 0, r0, c6, c7, 0
344 mcr p15, 0, r3, c6, c1, 0
[all …]
H A Dpmsa-v7.c38 #define DRBAR __ACCESS_CP15(c6, 0, c1, 0)
39 #define IRBAR __ACCESS_CP15(c6, 0, c1, 1)
40 #define DRSR __ACCESS_CP15(c6, 0, c1, 2)
41 #define IRSR __ACCESS_CP15(c6, 0, c1, 3)
42 #define DRACR __ACCESS_CP15(c6, 0, c1, 4)
43 #define IRACR __ACCESS_CP15(c6, 0, c1, 5)
44 #define RNGNR __ACCESS_CP15(c6, 0, c2, 0)
H A Dcache-v4wt.S71 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
89 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
157 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
H A Dtlb-v4wb.S41 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
62 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
H A Dtlb-v4wbi.S41 mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
53 mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
H A Dcache-v4wb.S117 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
164 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
191 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
H A Dproc-arm926.S132 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
159 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
162 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
254 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
296 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
358 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
H A Dproc-arm925.S166 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
196 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
199 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
291 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
333 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
395 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
H A Dtlb-v6.S48 mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA (was 1)
77 mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA
H A Dpmsa-v8.c21 #define PRSEL __ACCESS_CP15(c6, 0, c2, 1)
22 #define PRBAR __ACCESS_CP15(c6, 0, c3, 0)
23 #define PRLAR __ACCESS_CP15(c6, 0, c3, 1)
H A Dpabort-v7.S19 mrc p15, 0, r0, c6, c0, 2 @ get IFAR
H A Dabort-ev7.S19 mrc p15, 0, r0, c6, c0, 0 @ get FAR
H A Dabort-ev4.S21 mrc p15, 0, r0, c6, c0, 0 @ get FAR
H A Dabort-ev4t.S22 mrc p15, 0, r0, c6, c0, 0 @ get FAR
H A Dproc-xscale.S239 mcr p15, 0, r0, c7, c6, 1 @ Invalidate D cache line
306 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
332 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
367 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
532 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
548 mcr p14, 0, r4, c6, c0, 0 @ clock configuration, turbo mode.
H A Dabort-ev5t.S22 mrc p15, 0, r0, c6, c0, 0 @ get FAR
H A Dabort-ev5tj.S22 mrc p15, 0, r0, c6, c0, 0 @ get FAR
/openbmc/qemu/pc-bios/s390-ccw/
H A Dstart.S89 stctg %c6,%c6,0(%r15)
91 lctlg %c6,%c6,0(%r15)
110 stctg %c6,%c6,0(%r15)
112 lctlg %c6,%c6,0(%r15)
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
H A Dg98.fuc0s520 cxsout $c6
542 cenc $c6 $c6
543 cxsout $c6
550 cxsin $c6
560 cenc $c6 $c6
577 cenc $c6 $c6
586 cxsin $c6
593 cenc $c6 $c6
612 cenc $c6 $c6
623 cenc $c6 $c6
[all …]
/openbmc/linux/arch/arm/kernel/
H A Dhead-nommu.S219 mcr p15, 0, \tmp, c6, c2, 0 @ Write RGNR
226 mcr p15, 0, \sr, c6, c1, (2 + \side) @ I/DRSR
337 AR_CLASS(mcr p15, 0, r0, c6, c2, 1) @ PRSEL
350 AR_CLASS(mcr p15, 0, r5, c6, c8, 0) @ PRBAR0
351 AR_CLASS(mcr p15, 0, r6, c6, c8, 1) @ PRLAR0
364 AR_CLASS(mcr p15, 0, r5, c6, c8, 4) @ PRBAR1
441 mcr p15, 0, r5, c6, c10, 0 @ PRBAR4
442 mcr p15, 0, r6, c6, c10, 1 @ PRLAR4
520 mcr p15, 0, r4, c6, c2, 1 @ PRSEL
526 mcr p15, 0, r5, c6, c3, 0 @ PRBAR
[all …]
/openbmc/linux/arch/arm/include/asm/hardware/
H A Dcp14.h48 #define RCP14_DBGWFAR() MRC14(0, c0, c6, 0)
63 #define RCP14_DBGBVR6() MRC14(0, c0, c6, 4)
79 #define RCP14_DBGBCR6() MRC14(0, c0, c6, 5)
95 #define RCP14_DBGWVR6() MRC14(0, c0, c6, 6)
111 #define RCP14_DBGWCR6() MRC14(0, c0, c6, 7)
128 #define RCP14_DBGBXVR6() MRC14(0, c1, c6, 1)
279 #define RCP14_ETMTSSCR() MRC14(1, c0, c6, 0)
295 #define RCP14_ETMACVR6() MRC14(1, c0, c6, 1)
311 #define RCP14_ETMACTR6() MRC14(1, c0, c6, 2)
324 #define RCP14_ETMDCVR6() MRC14(1, c0, c6, 3)
[all …]
/openbmc/linux/arch/powerpc/crypto/
H A Daes-tab-4k.S33 .long R(c6, 63, 63, a5), R(f8, 7c, 7c, 84)
132 .long R(73, b4, b4, c7), R(97, c6, c6, 51)
156 .long R(84, 42, 42, c6), R(d0, 68, 68, b8)
175 .long R(8d, 46, 97, a3), R(6b, d3, f9, c6)
232 .long R(8b, 43, 29, 76), R(cb, 23, c6, dc)
235 .long R(13, 97, 22, 40), R(84, c6, 11, 20)
263 .long R(c6, a5, 94, 30), R(35, a2, 66, c0)
/openbmc/u-boot/arch/arm/cpu/arm946es/
H A Dstart.S80 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */

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