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/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h334 static inline void set_dly(u32 bytelane, u32 dly) in set_dly() argument
340 writel(r, BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in set_dly()
343 static inline bool incr_dly(u32 bytelane) in incr_dly() argument
498 static inline int look_for(u32 bytelane) in look_for() argument
529 if (!incr_dly(bytelane)) in look_for()
538 static inline int look_past(u32 bytelane) in look_past() argument
571 if (!incr_dly(bytelane)) in look_past()
582 set_dly(bytelane, 0); /* Start training at DQS=0 */ in hal_vcoreiii_train_bytelane()
596 center_dly(bytelane, dqs_s); in hal_vcoreiii_train_bytelane()
695 set_dly(bytelane, 0); /* Start training at DQS=0 */ in hal_vcoreiii_train_bytelane()
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