| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | smc.c | 1353 uint8_t ch, rk, bl; in restore_timings() local 1358 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in restore_timings() 1359 set_rcvn(ch, rk, bl, mt->rcvn[ch][rk][bl]); in restore_timings() 1360 set_rdqs(ch, rk, bl, mt->rdqs[ch][rk][bl]); in restore_timings() 1361 set_wdqs(ch, rk, bl, mt->wdqs[ch][rk][bl]); in restore_timings() 1362 set_wdq(ch, rk, bl, mt->wdq[ch][rk][bl]); in restore_timings() 1365 set_vref(ch, bl, mt->vref[ch][bl]); in restore_timings() 1382 uint8_t ch, rk, bl; in default_timings() local 1386 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in default_timings() 1387 set_rdqs(ch, rk, bl, 24); in default_timings() [all …]
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| H A D | mrc_util.c | 1026 uint8_t bl; /* which BL in the module (always 2 per module) */ in sample_dqs() local 1065 for (bl = 0; bl < 2; bl++) { in sample_dqs() 1069 if (sampled_val[j] & msk[bl]) in sample_dqs() 1075 ret_val |= (1 << (bl + bl_grp * 2)); in sample_dqs() 1095 uint8_t bl; /* byte lane counter */ in find_rising_edge() local 1111 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in find_rising_edge() 1114 set_rcvn(channel, rank, bl, in find_rising_edge() 1115 delay[bl] + sample * SAMPLE_DLY); in find_rising_edge() 1117 set_wdqs(channel, rank, bl, in find_rising_edge() 1118 delay[bl] + sample * SAMPLE_DLY); in find_rising_edge() [all …]
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| /openbmc/qemu/hw/scsi/ |
| H A D | emulation.c | 6 int scsi_emulate_block_limits(uint8_t *outbuf, const SCSIBlockLimits *bl) in scsi_emulate_block_limits() argument 11 outbuf[0] = bl->wsnz; /* wsnz */ in scsi_emulate_block_limits() 13 if (bl->max_io_sectors) { in scsi_emulate_block_limits() 17 stw_be_p(outbuf + 2, MIN(bl->min_io_size, bl->max_io_sectors)); in scsi_emulate_block_limits() 20 stl_be_p(outbuf + 4, bl->max_io_sectors); in scsi_emulate_block_limits() 23 stl_be_p(outbuf + 8, MIN(bl->opt_io_size, bl->max_io_sectors)); in scsi_emulate_block_limits() 25 stw_be_p(outbuf + 2, bl->min_io_size); in scsi_emulate_block_limits() 26 stl_be_p(outbuf + 8, bl->opt_io_size); in scsi_emulate_block_limits() 30 stl_be_p(outbuf + 16, bl->max_unmap_sectors); in scsi_emulate_block_limits() 33 stl_be_p(outbuf + 20, bl->max_unmap_descr); in scsi_emulate_block_limits() [all …]
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | lowlevel.S | 63 bl get_gic_offset 64 bl gic_kick_secondary_cpus 92 bl ccn504_set_aux 100 bl get_svr 108 bl ccn504_set_aux 111 bl ccn504_set_aux 119 bl ccn504_add_masters_to_dvm 124 bl ccn504_set_qos 127 bl ccn504_set_qos 130 bl ccn504_set_qos [all …]
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| /openbmc/u-boot/arch/arm/cpu/armv8/ |
| H A D | exceptions.S | 40 bl _exception_entry 41 bl do_bad_sync 67 bl _exception_entry 68 bl do_bad_irq 93 bl _exception_entry 94 bl do_bad_fiq 112 bl _exception_entry 113 bl do_bad_error 140 bl _exception_entry 141 bl do_sync [all …]
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| H A D | start.S | 88 bl reset_sctrl 139 bl apply_core_errata 149 bl lowlevel_init 169 bl _main 295 bl gic_init_secure 299 bl gic_init_secure_percpu 303 bl gic_init_secure_percpu 319 bl gic_wait_for_interrupt 327 bl armv8_switch_to_el2 333 bl armv8_switch_to_el1
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| /openbmc/u-boot/arch/arm/mach-rmobile/ |
| H A D | lowlevel_init_gen3.S | 27 bl gic_init_secure 34 bl gic_init_secure 38 bl gic_init_secure_percpu 42 bl gic_init_secure_percpu 57 bl gic_wait_for_interrupt 65 bl armv8_switch_to_el2 71 bl armv8_switch_to_el1 77 bl s_init
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | crt0.S | 77 bl board_init_f_alloc_reserve 81 bl board_init_f_init_reserve 84 bl board_init_f 132 bl relocate_vectors 136 bl c_runtime_cpu_setup /* we still call old routine here */ 141 bl spl_relocate_stack_gd 153 bl memset 165 bl coloured_LED_init 166 bl red_led_on
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| H A D | crt0_64.S | 83 bl board_init_f_alloc_reserve 87 bl board_init_f_init_reserve 90 bl board_init_f 121 bl c_runtime_cpu_setup /* still call old routine */ 124 bl spl_relocate_stack_gd /* may return NULL */
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| H A D | vectors.S | 254 bl do_undefined_instruction 260 bl do_software_interrupt 266 bl do_prefetch_abort 272 bl do_data_abort 278 bl do_not_used 285 bl do_irq 291 bl do_fiq
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| /openbmc/qemu/tests/tcg/ppc64/ |
| H A D | non_signalling_xscv.c | 8 uint64_t th, tl, bh = B_HI, bl = B_LO; \ 17 : "r" (bh), "r" (bl) \ 20 "%016" PRIx64 "\n", bh, bl, th, tl); \
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| /openbmc/u-boot/arch/arm/cpu/arm720t/ |
| H A D | start.S | 42 bl cpu_init_crit 45 bl _main 75 bl lowlevel_init
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| /openbmc/qemu/block/ |
| H A D | blkio.c | 994 bs->bl.request_alignment = value; in blkio_refresh_limits() 995 if (bs->bl.request_alignment < 1 || in blkio_refresh_limits() 996 bs->bl.request_alignment >= INT_MAX || in blkio_refresh_limits() 997 !is_power_of_2(bs->bl.request_alignment)) { in blkio_refresh_limits() 1000 bs->bl.request_alignment); in blkio_refresh_limits() 1010 bs->bl.opt_transfer = value; in blkio_refresh_limits() 1011 if (bs->bl.opt_transfer > INT_MAX || in blkio_refresh_limits() 1012 (bs->bl.opt_transfer % bs->bl.request_alignment)) { in blkio_refresh_limits() 1014 "be a multiple of %" PRIu32, bs->bl.opt_transfer, in blkio_refresh_limits() 1015 bs->bl.request_alignment); in blkio_refresh_limits() [all …]
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| H A D | blkdebug.c | 527 align = MAX(s->align, bs->file->bs->bl.request_alignment); in blkdebug_open() 640 assert(QEMU_IS_ALIGNED(offset, bs->bl.request_alignment)); in blkdebug_co_preadv() 641 assert(QEMU_IS_ALIGNED(bytes, bs->bl.request_alignment)); in blkdebug_co_preadv() 642 if (bs->bl.max_transfer) { in blkdebug_co_preadv() 643 assert(bytes <= bs->bl.max_transfer); in blkdebug_co_preadv() 661 assert(QEMU_IS_ALIGNED(offset, bs->bl.request_alignment)); in blkdebug_co_pwritev() 662 assert(QEMU_IS_ALIGNED(bytes, bs->bl.request_alignment)); in blkdebug_co_pwritev() 663 if (bs->bl.max_transfer) { in blkdebug_co_pwritev() 664 assert(bytes <= bs->bl.max_transfer); in blkdebug_co_pwritev() 690 uint32_t align = MAX(bs->bl.request_alignment, in blkdebug_co_pwrite_zeroes() [all …]
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| /openbmc/u-boot/arch/powerpc/cpu/mpc86xx/ |
| H A D | cpu.c | 190 unsigned long batu, bl; in setup_ddr_bat() local 192 bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED)); in setup_ddr_bat() 194 if (BATU_SIZE(bl) != dram_size) { in setup_ddr_bat() 195 u64 sz = (u64)dram_size - BATU_SIZE(bl); in setup_ddr_bat() 199 batu = bl | BATU_VS | BATU_VP; in setup_ddr_bat()
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| /openbmc/u-boot/arch/arm/cpu/arm946es/ |
| H A D | start.S | 49 bl cpu_init_crit 52 bl _main 97 bl lowlevel_init /* go setup memory */
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| /openbmc/u-boot/arch/arm/cpu/arm1136/ |
| H A D | start.S | 43 bl cpu_init_crit 46 bl _main 90 bl lowlevel_init /* go setup pll,mux,memory */
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/ |
| H A D | start.S | 50 bl cpu_init_crit 53 bl _main 108 bl lowlevel_init /* go setup pll,mux,memory */
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| /openbmc/qemu/pc-bios/optionrom/ |
| H A D | kvmvapic.S | 192 mov 24(%esp), %bl 200 cmp %bh, %bl 203 mov %bh, %bl 208 cmp %bh, %bl 286 mov 16(%esp), %bl 294 cmp %bh, %bl 297 mov %bh, %bl 302 cmp %bh, %bl
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| /openbmc/u-boot/arch/arm/cpu/arm920t/ |
| H A D | start.S | 57 bl cpu_init_crit 60 bl _main 108 bl lowlevel_init
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| /openbmc/skeleton/op-flasher/ |
| H A D | flasher_obj.c | 49 static struct blocklevel_device *bl; variable 64 rc = arch_flash_erase_chip(bl); in erase_chip() 137 rc = blocklevel_write(bl, start, file_buf, len); in program_file() 165 arch_flash_close(bl, NULL); in flash_access_cleanup() 174 rc = arch_flash_access(bl, chip); in flash_access_setup() 180 rc = arch_flash_init(&bl, NULL, 1); in flash_access_setup()
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| /openbmc/u-boot/arch/arm/cpu/sa1100/ |
| H A D | start.S | 43 bl cpu_init_crit 46 bl _main 105 bl lowlevel_init
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| /openbmc/u-boot/arch/arm/cpu/armv7/ |
| H A D | psci.S | 261 bl psci_v7_flush_dcache_all 271 bl psci_v7_flush_dcache_all 275 bl psci_disable_smp 312 bl psci_get_cpu_id @ CPU ID => r0 313 bl psci_get_cpu_stack_top @ stack top => r0 330 bl psci_enable_smp 332 bl _nonsec_init 334 bl psci_stack_setup 336 bl psci_arch_cpu_entry 338 bl psci_get_cpu_id @ CPU ID => r0 [all …]
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| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | psci.S | 52 bl psci_get_cpu_id @ CPU ID => r0 70 bl psci_cpu_off_common 72 bl psci_get_cpu_id @ CPU ID => r0 93 bl psci_save @ store target PC and context id
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| /openbmc/u-boot/include/ |
| H A D | watchdog.h | 40 #define WATCHDOG_RESET bl hw_watchdog_reset 52 #define WATCHDOG_RESET bl watchdog_reset
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