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Searched refs:bf_use_max_pll_rate (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/phy/marvell/
H A Dcomphy_a3700.h139 #define bf_use_max_pll_rate BIT(9) macro
142 #define bf_use_max_pll_rate BIT(9) macro
H A Dcomphy_a3700.c174 reg_set16(phy_addr(PCIE, LANE_CFG1), bf_use_max_pll_rate, 0); in comphy_pcie_power_up()