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Searched refs:base_address (Results 1 – 25 of 29) sorted by relevance

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/openbmc/qemu/hw/acpi/
H A Dipmi.c26 aml_append(crs, aml_io(AML_DECODE16, info->base_address, in aml_ipmi_crs()
27 info->base_address + info->register_length - 1, in aml_ipmi_crs()
36 info->base_address, in aml_ipmi_crs()
37 info->base_address + info->register_length - 1, in aml_ipmi_crs()
46 info->base_address, in aml_ipmi_crs()
47 info->base_address + info->register_length - 1, in aml_ipmi_crs()
51 aml_append(crs, aml_i2c_serial_bus_device(info->base_address, in aml_ipmi_crs()
/openbmc/qemu/hw/smbios/
H A Dsmbios_type_38.c23 uint64_t base_address; member
30 uint64_t baseaddr = info->base_address; in smbios_build_one_type_38()
55 t->base_address = cpu_to_le64(baseaddr); in smbios_build_one_type_38()
/openbmc/u-boot/drivers/sound/
H A Drockchip_i2s.c51 struct rk_i2s_regs *regs = (struct rk_i2s_regs *)priv->base_address; in rockchip_i2s_init()
107 struct rk_i2s_regs *regs = (struct rk_i2s_regs *)priv->base_address; in rockchip_i2s_tx_data()
122 priv->base_address = base; in rockchip_i2s_probe()
H A Dbroadwell_i2s.c252 uc_priv->base_address = bar0 + offset; in broadwell_i2s_probe()
266 priv->shim = (struct i2s_shim_regs *)uc_priv->base_address; in broadwell_i2s_probe()
280 uc_priv->base_address, offset); in broadwell_i2s_probe()
H A Dsamsung-i2s.c262 struct i2s_reg *i2s_reg = (struct i2s_reg *)pi2s_tx->base_address; in i2s_transfer_tx_data()
300 struct i2s_reg *i2s_reg = (struct i2s_reg *)pi2s_tx->base_address; in i2s_tx_init()
403 priv->base_address = base; in samsung_i2s_ofdata_to_platdata()
/openbmc/u-boot/cmd/
H A Dmem.c40 static ulong base_address = 0; variable
75 addr += base_address; in do_mem_md()
130 addr += base_address; in do_mem_mw()
248 addr1 += base_address; in do_mem_cmp()
251 addr2 += base_address; in do_mem_cmp()
317 addr += base_address; in do_mem_cp()
320 dest += base_address; in do_mem_cp()
357 base_address = simple_strtoul(argv[1], NULL, 16); in do_mem_base()
361 printf("Base Address: 0x%08lx\n", base_address); in do_mem_base()
988 addr += base_address; in mod_mem()
/openbmc/u-boot/board/freescale/b4860qds/
H A Dddr.c228 pinfo->common_timing_params[i].base_address = in step_assign_addresses()
243 pinfo->common_timing_params[i].base_address = in step_assign_addresses()
249 pinfo->dimm_params[i][j].base_address = in step_assign_addresses()
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand.c23 static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST; variable
83 ulong base_addr = base_address[i]; in nand_init_chip()
H A Dfsl_elbc_nand.c801 static unsigned long base_address[CONFIG_SYS_MAX_NAND_DEVICE] = variable
809 fsl_elbc_chip_init(i, (u8 *)base_address[i]); in board_nand_init()
/openbmc/u-boot/include/
H A Dcommon_timing_params.h62 unsigned long long base_address; member
H A Di2s.h86 unsigned int base_address; /* I2S Register Base */ member
H A Dfsl_ddr_dimm_params.h44 unsigned long long base_address; member
H A Dfdt_support.h286 int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
/openbmc/u-boot/board/micronas/vct/
H A Dscc.c473 reg_write(SCC_CMD(scc_descriptor_table[id].base_address), dma_cmd.reg); in scc_takeover_dma()
500 reg_write(SCC_CMD(scc_descriptor_table[id].base_address), dma_cmd.reg); in scc_dma_cmd()
594 reg_write(SCC_DMA_CFG(scc_descriptor_table[id].base_address), in scc_setup_dma()
621 reg_write(SCC_ENABLE(scc_descriptor_table[id].base_address), value); in scc_enable()
646 reg_write(SCC_RESET(scc_descriptor_table[id].base_address), value); in scc_reset()
H A Dscc.h58 u32 base_address; /* base address of the SCC unit reg shell*/ member
/openbmc/u-boot/drivers/ddr/fsl/
H A Dmain.c350 pinfo->common_timing_params[i].base_address = in __step_assign_addresses()
361 pinfo->common_timing_params[i].base_address = in __step_assign_addresses()
366 pinfo->dimm_params[i][j].base_address = in __step_assign_addresses()
385 pinfo->common_timing_params[i].base_address = in __step_assign_addresses()
391 pinfo->dimm_params[i][j].base_address = in __step_assign_addresses()
H A Dctrl_regs.c2455 sa = common_dimm->base_address; in compute_fsl_memctl_config_regs()
2469 sa = common_dimm->base_address; in compute_fsl_memctl_config_regs()
2474 sa = dimm_params[dimm_number].base_address + in compute_fsl_memctl_config_regs()
2478 sa = dimm_params[dimm_number].base_address; in compute_fsl_memctl_config_regs()
2484 sa = dimm_params[dimm_number].base_address; in compute_fsl_memctl_config_regs()
2498 sa = dimm_params[dimm_number].base_address; in compute_fsl_memctl_config_regs()
2511 sa = dimm_params[dimm_number].base_address; in compute_fsl_memctl_config_regs()
H A Dinteractive.c199 COMMON_TIMING(base_address), in lowest_common_dimm_parameters_edit()
308 DIMM_PARM(base_address), in fsl_ddr_dimm_parameters_edit()
423 pdimm->base_address, in print_dimm_parameters()
424 (pdimm->base_address >> 32), in print_dimm_parameters()
425 pdimm->base_address & 0xFFFFFFFF); in print_dimm_parameters()
491 plcd_dimm_params->base_address, in print_lowest_common_dimm_parameters()
492 plcd_dimm_params->base_address / 0x100000); in print_lowest_common_dimm_parameters()
H A Dutil.c125 unsigned long long base = memctl_common_params->base_address; in __fsl_ddr_set_lawbar()
/openbmc/u-boot/include/linux/
H A Dedd.h79 __u16 base_address; member
/openbmc/qemu/hw/i386/kvm/
H A Dioapic.c90 kioapic->base_address = s->busdev.mmio[0].addr; in kvm_ioapic_put()
/openbmc/qemu/include/hw/ipmi/
H A Dipmi.h92 uint64_t base_address; member
/openbmc/u-boot/common/
H A Dfdt_support.c1648 int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width, in fdt_setup_simplefb_node() argument
1659 cells[i++] = cpu_to_fdt32(base_address >> 32); in fdt_setup_simplefb_node()
1660 cells[i++] = cpu_to_fdt32(base_address); in fdt_setup_simplefb_node()
1669 snprintf(name, sizeof(name), "framebuffer@%llx", base_address); in fdt_setup_simplefb_node()
/openbmc/qemu/hw/ipmi/
H A Dsmbus_ipmi.c348 info->base_address = sid->parent.i2c.address; in smbus_ipmi_get_fwinfo()
H A Dipmi_kcs.c407 info->base_address = ik->io_base; in ipmi_kcs_get_fwinfo()

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