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Searched refs:b3WireDataLength (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/staging/rtl8192u/
H A Dr819xU_phyreg.h112 #define b3WireDataLength 0x800 macro
H A Dr8190_rtl8256.c153 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-seri… in phy_rf8256_config_para_file()
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_rf6052.c119 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255… in phy_RF6052_Config_ParaFile()
/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Dr8190P_rtl8256.c87 b3WireDataLength, 0x0); in rtl92e_config_rf()
H A Dr8192E_phyreg.h265 #define b3WireDataLength 0x800 macro
/openbmc/linux/drivers/staging/rtl8712/
H A Drtl871x_mp_phy_regdef.h466 #define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParm1 */ macro
/openbmc/linux/drivers/staging/rtl8723bs/include/
H A DHal8192CPhyReg.h552 #define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ macro