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/openbmc/qemu/include/user/
H A Dabitypes.h43 typedef int16_t abi_short __attribute__ ((aligned(ABI_SHORT_ALIGNMENT)));
44 typedef uint16_t abi_ushort __attribute__((aligned(ABI_SHORT_ALIGNMENT)));
45 typedef int32_t abi_int __attribute__((aligned(ABI_INT_ALIGNMENT)));
46 typedef uint32_t abi_uint __attribute__((aligned(ABI_INT_ALIGNMENT)));
47 typedef int64_t abi_llong __attribute__((aligned(ABI_LLONG_ALIGNMENT)));
48 typedef uint64_t abi_ullong __attribute__((aligned(ABI_LLONG_ALIGNMENT)));
51 typedef uint32_t abi_ulong __attribute__((aligned(ABI_LONG_ALIGNMENT)));
52 typedef int32_t abi_long __attribute__((aligned(ABI_LONG_ALIGNMENT)));
63 typedef target_ulong abi_ulong __attribute__((aligned(ABI_LONG_ALIGNMENT)));
64 typedef target_long abi_long __attribute__((aligned(ABI_LONG_ALIGNMENT)));
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-connectivity/libtorrent/
H A Dlibtorrent_0.14.0.bb20 PACKAGECONFIG ??= "instrumentation aligned"
27 PACKAGECONFIG[aligned] = "--enable-aligned,--disable-aligned,"
/openbmc/phosphor-networkd/test/
H A Dtest_rtnetlink.cpp25 ifinfomsg hdr __attribute__((aligned(NLMSG_ALIGNTO))); in TEST()
38 ifinfomsg hdr __attribute__((aligned(NLMSG_ALIGNTO))); in TEST()
39 rtattr addr_hdr __attribute__((aligned((RTA_ALIGNTO)))); in TEST()
41 __attribute__((aligned((RTA_ALIGNTO)))) = {0, 1, 2, 3, 4, 5}; in TEST()
42 rtattr name_hdr __attribute__((aligned((RTA_ALIGNTO)))); in TEST()
43 char name[5] __attribute__((aligned((RTA_ALIGNTO)))) = "eth0"; in TEST()
44 rtattr mtu_hdr __attribute__((aligned((RTA_ALIGNTO)))); in TEST()
45 unsigned mtu __attribute__((aligned((RTA_ALIGNTO)))) = 50; in TEST()
/openbmc/u-boot/doc/
H A DREADME.displaying-bmps6 make sure all data is properly aligned, and in many situations simply choosing
7 a 32 bit aligned address is enough to ensure proper alignment. This is not
23 When placed in an aligned address such as 0x80a00000, char signature offsets
26 access is generated at a non-32-bit-aligned address, causing a data abort.
27 The proper alignment for BMP images is therefore: 32-bit-aligned-address + 2.
H A DREADME.arm-caches38 memory DMA buffer) should be aligned to cache-line boundary both at
40 - If the buffer is not cache-line aligned invalidation will be restricted
41 to the aligned part. That is, one cache-line at the respective boundary
/openbmc/u-boot/include/
H A Dbinman_sym.h37 __attribute__((aligned(4), unused, section(".binman_sym")))
48 __attribute__((aligned(4), unused, section(".binman_sym")))
62 __attribute__((aligned(4), weak, unused, \
/openbmc/qemu/include/standard-headers/linux/
H A Dvirtio_ring.h126 typedef struct vring_used_elem __attribute__((aligned(VRING_USED_ALIGN_SIZE)))
149 typedef struct vring_desc __attribute__((aligned(VRING_DESC_ALIGN_SIZE)))
151 typedef struct vring_avail __attribute__((aligned(VRING_AVAIL_ALIGN_SIZE)))
153 typedef struct vring_used __attribute__((aligned(VRING_USED_ALIGN_SIZE)))
/openbmc/qemu/pc-bios/s390-ccw/
H A Dcio.h122 } __attribute__ ((packed, aligned(4))) Schib;
136 } __attribute__ ((packed, aligned(4))) SubChannelId;
170 } __attribute__ ((packed, aligned(4)));
186 } __attribute__ ((packed, aligned(8))) Ccw0;
194 } __attribute__ ((packed, aligned(8))) Ccw1;
256 } __attribute__ ((packed, aligned(4))) CmdOrb;
282 } __attribute__ ((packed, aligned(4))) SenseId;
334 } __attribute__ ((packed, aligned(4))) SenseDataEckdDasd;
348 } __attribute__ ((packed, aligned(4))) Irb;
H A Ds390-arch.h17 } __attribute__ ((aligned(8))) PSW;
24 } __attribute__ ((aligned(8))) PSWLegacy;
94 } __attribute__((packed, aligned(8192))) LowCore;
/openbmc/qemu/tests/tcg/hexagon/
H A Dscatter_gather.c37 __attribute__((aligned(128)));
39 __attribute__((aligned(128)));
41 __attribute__((aligned(128)));
59 } vtcm __attribute__((aligned(0x10000)));
70 unsigned short half_offsets[MATRIX_SIZE] __attribute__((aligned(128)));
71 unsigned int word_offsets[MATRIX_SIZE] __attribute__((aligned(128)));
74 unsigned short half_values[MATRIX_SIZE] __attribute__((aligned(128)));
75 unsigned short half_values_acc[MATRIX_SIZE] __attribute__((aligned(128)));
76 unsigned short half_values_masked[MATRIX_SIZE] __attribute__((aligned(128)));
77 unsigned int word_values[MATRIX_SIZE] __attribute__((aligned(128)));
[all …]
H A Dhvx_histogram.c30 static uint8_t input[height][stride] __attribute__((aligned(128))) = {
34 static int result[256] __attribute__((aligned(128)));
35 static int expect[256] __attribute__((aligned(128)));
H A Dhvx_misc.h48 MMVector buffer0[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
49 MMVector buffer1[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
50 MMVector mask[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
51 MMVector output[OUTSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
52 MMVector expect[OUTSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
H A Dv68_hvx.c28 MMVector v6mpy_buffer0[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
29 MMVector v6mpy_buffer1[BUFSIZE] __attribute__((aligned(MAX_VEC_SIZE_BYTES)));
H A Dbrev.c29 int64_t dbuf[SIZE] __attribute__((aligned(1 << 16))) = {0};
30 int32_t wbuf[SIZE] __attribute__((aligned(1 << 16))) = {0};
31 int16_t hbuf[SIZE] __attribute__((aligned(1 << 16))) = {0};
32 uint8_t bbuf[SIZE] __attribute__((aligned(1 << 16))) = {0};
H A Dinvalid-slots.c18 char mem[8] __attribute__((aligned(8)));
/openbmc/libcper/include/libcper/sections/
H A Dcper-section-cxl-component.h29 } __attribute__((packed, aligned(1))) EFI_CXL_DEVICE_ID_INFO;
36 } __attribute__((packed, aligned(1))) EFI_CXL_COMPONENT_EVENT_HEADER;
/openbmc/qemu/linux-headers/asm-riscv/
H A Dptrace.h70 __u64 f[64] __attribute__((aligned(16)));
85 __u32 __padding[129] __attribute__((aligned(16)));
/openbmc/u-boot/drivers/net/
H A Dftmac100.h103 } __attribute__ ((aligned(16)));
124 } __attribute__ ((aligned(16)));
/openbmc/u-boot/drivers/usb/host/
H A Dohci.h70 } __attribute__((aligned(ED_ALIGNMENT)));
128 } __attribute__((aligned(TD_ALIGNMENT)));
146 } __attribute__((aligned(256)));
190 } __attribute__((aligned(32)));
/openbmc/qemu/host/include/aarch64/host/
H A Dload-extract-al16-al8.h.inc31 * With FEAT_LSE2, LDP is single-copy atomic if 16-byte aligned
32 * and single-copy atomic on the parts if 8-byte aligned.
H A Datomic128-ldst.h.inc33 /* With FEAT_LSE2, 16-byte aligned LDP is atomic. */
46 /* With FEAT_LSE2, 16-byte aligned LDP is atomic. */
66 /* With FEAT_LSE2, 16-byte aligned STP is atomic. */
/openbmc/u-boot/drivers/ata/
H A Dsata_sil.h44 } __attribute__ ((aligned(8), packed));
54 } __attribute__ ((aligned(8), packed));
/openbmc/qemu/accel/tcg/
H A Dldst_atomicity.c.inc63 * Both halves are naturally aligned and atomic.
78 * that must be aligned. Note that we only really need ctz4() --
106 * Atomically load 2 aligned bytes from @pv.
118 * Atomically load 4 aligned bytes from @pv.
130 * Atomically load 8 aligned bytes from @pv.
146 * Atomically load 8 aligned bytes from @pv.
181 * Atomically load 16 aligned bytes from @pv.
381 * Load 8 bytes from aligned @pv, with at least 4-byte atomicity.
596 * Atomically store 2 aligned bytes to @pv.
609 * Atomically store 4 aligned bytes to @pv.
[all …]
/openbmc/u-boot/arch/m68k/include/asm/
H A Dtypes.h12 } __attribute__((aligned(16))) vector128;
/openbmc/openbmc/meta-openembedded/meta-initramfs/recipes-kernel/kexec/kexec-tools-klibc/
H A Darm_crashdump-fix-buffer-align.patch36 * aligned to 1MB. This is because kernel create_mapping() wants memory
37 * regions to be aligned to SECTION_SIZE.

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