Home
last modified time | relevance | path

Searched refs:__raw_readq (Results 1 – 25 of 72) sorted by relevance

123

/openbmc/linux/arch/mips/pci/
H A Dpci-tx4938.c25 (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ? in tx4938_report_pciclk()
27 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { in tx4938_report_pciclk()
28 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pciclk()
61 __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pci1clk()
78 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { in tx4938_pciclk66_setup()
80 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_pciclk66_setup()
109 (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg)); in tx4938_pciclk66_setup()
120 if (__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_pcic1_map_irq()
125 if (__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_pcic1_map_irq()
H A Dpci-tx4927.c25 (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ? in tx4927_report_pciclk()
27 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) { in tx4927_report_pciclk()
28 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_report_pciclk()
58 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) { in tx4927_pciclk66_setup()
60 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_pciclk66_setup()
78 (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg)); in tx4927_pciclk66_setup()
/openbmc/linux/arch/mips/sibyte/swarm/
H A Drtc_m41t81.c85 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_read()
92 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_read()
98 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_read()
101 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in m41t81_read()
107 return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff; in m41t81_read()
112 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_write()
120 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_write()
123 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in m41t81_write()
133 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_write()
H A Drtc_xicor1241.c60 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read()
68 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read()
74 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read()
77 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in xicor_read()
83 return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff; in xicor_read()
88 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_write()
96 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_write()
99 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in xicor_write()
H A Dplatform.c61 offset = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_START_ADDR, IDE_CS)); in swarm_pata_init()
62 size = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_MULT_SIZE, IDE_CS)); in swarm_pata_init()
/openbmc/linux/arch/mips/kernel/
H A Dcsrc-bcm1480.c21 return (u64) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); in bcm1480_hpt_read()
34 return __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); in sb1480_read_sched_clock()
43 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in sb1480_clocksource_init()
/openbmc/linux/arch/mips/txx9/rbtx4927/
H A Dsetup.c64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup()
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup()
111 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB); in tx4937_pci_setup()
116 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) in tx4937_pci_setup()
241 switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) & in rbtx4927_clock_init()
267 switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) & in rbtx4937_clock_init()
/openbmc/linux/include/asm-generic/
H A Dlogic_io.h49 #define __raw_readq __raw_readq macro
50 u64 __raw_readq(const volatile void __iomem *addr);
H A Dfb.h68 #if defined(__raw_readq)
71 return __raw_readq(addr); in fb_readq()
/openbmc/linux/arch/mips/sibyte/common/
H A Dsb_tbprof.c153 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); in arm_tb()
206 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
208 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
210 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
212 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
214 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
216 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
272 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); in sbprof_zbprof_start()
/openbmc/linux/arch/arm64/include/asm/
H A Dio.h82 #define __raw_readq __raw_readq macro
83 static __always_inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function
156 #define ioread64be(p) ({ __u64 __v = be64_to_cpu((__force __be64)__raw_readq(p)); __iormb(__v); __…
/openbmc/linux/drivers/i2c/busses/
H A Di2c-octeon-core.h128 __raw_readq(addr); /* wait for write to land */ in octeon_i2c_writeq_flush()
146 tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_reg_write()
174 tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_reg_read()
201 return __raw_readq(i2c->twsi_base + TWSI_INT(i2c)); in octeon_i2c_read_int()
H A Di2c-octeon-core.c83 return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0; in octeon_i2c_hlc_test_valid()
186 stat = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_check_status()
427 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_hlc_read()
435 cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c)); in octeon_i2c_hlc_read()
480 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_hlc_write()
525 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_hlc_comp_read()
533 cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c)); in octeon_i2c_hlc_comp_read()
589 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c)); in octeon_i2c_hlc_comp_write()
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dsb1250-mac.c481 if (__raw_readq(sbm_mdio) & M_MAC_MDIO_IN) in sbmac_mii_read()
1693 reg = __raw_readq(sc->sbm_rxfilter); in sbmac_promiscuous_mode()
1698 reg = __raw_readq(sc->sbm_rxfilter); in sbmac_promiscuous_mode()
1721 reg = __raw_readq(sc->sbm_rxfilter); in sbmac_set_iphdr_offset()
1803 cfg = __raw_readq(s->sbm_maccfg); in sbmac_set_speed()
1804 framecfg = __raw_readq(s->sbm_framecfg); in sbmac_set_speed()
1892 cfg = __raw_readq(s->sbm_maccfg); in sbmac_set_duplex()
2086 reg = __raw_readq(sc->sbm_rxfilter); in sbmac_setmulti()
2095 reg = __raw_readq(sc->sbm_rxfilter); in sbmac_setmulti()
2127 reg = __raw_readq(sc->sbm_rxfilter); in sbmac_setmulti()
[all …]
/openbmc/linux/arch/riscv/include/asm/
H A Dmmio.h72 #define __raw_readq __raw_readq macro
73 static inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function
96 #define readq_cpu(c) ({ u64 __r = le64_to_cpu((__force __le64)__raw_readq(c)); __r; })
/openbmc/linux/arch/mips/txx9/generic/
H A Dsetup_tx4938.c293 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_ETH0_SEL) in tx4938_sio_init()
312 u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg); in tx4938_ethaddr_init()
356 if ((__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_ata_init()
362 ebccr = __raw_readq(&tx4938_ebuscptr->cr[i]); in tx4938_ata_init()
393 if ((__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_ndfmc_init()
416 u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg); in tx4938_aclc_init()
/openbmc/linux/arch/mips/sibyte/bcm1480/
H A Dsetup.c110 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); in bcm1480_setup()
120 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in bcm1480_setup()
H A Dirq.c157 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], in ack_bcm1480_irq()
319 mask_h = __raw_readq( in dispatch_ip2()
321 mask_l = __raw_readq( in dispatch_ip2()
/openbmc/linux/arch/mips/include/asm/txx9/
H A Dtx4927.h201 ((__u32)__raw_readq(&tx4927_ccfgptr->crir) >> 16)
203 #define TX4927_SDRAMC_CR(ch) __raw_readq(&tx4927_sdramcptr->cr[(ch)])
208 #define TX4927_EBUSC_CR(ch) __raw_readq(&tx4927_ebuscptr->cr[(ch)])
/openbmc/linux/arch/mips/sibyte/sb1250/
H A Dsetup.c175 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); in sb1250_setup()
184 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in sb1250_setup()
/openbmc/linux/arch/alpha/include/asm/
H A Dio.h272 extern u64 __raw_readq(const volatile void __iomem *addr);
280 #define __raw_readq __raw_readq macro
496 extern inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function
524 ret = __raw_readq(addr); in readq()
587 return __raw_readq(addr); in readq_relaxed()
/openbmc/linux/arch/alpha/kernel/
H A Dio.c138 u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function
166 EXPORT_SYMBOL(__raw_readq);
203 ret = __raw_readq(addr); in readq()
266 return __raw_readq(addr); in readq_relaxed()
492 *(u64 *)to = __raw_readq(from); in memcpy_fromio()
/openbmc/linux/arch/sparc/include/asm/
H A Dio_64.h57 #define __raw_readq __raw_readq macro
58 static inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function
321 return __raw_readq(addr); in sbus_readq()
/openbmc/linux/arch/mips/lib/
H A Diomap_copy.c24 *dst++ = __raw_readq(src++); in __ioread64_copy()
/openbmc/linux/arch/mips/include/asm/
H A Dfb.h26 return __raw_readq(addr); in fb_readq()

123