Searched refs:_PIPE_H_SRCSZ_MASK (Results 1 – 2 of 2) sorted by relevance
50 #define _PIPE_H_SRCSZ_MASK (0x1fff << _PIPE_H_SRCSZ_SHIFT) macro
264 plane->width = (vgpu_vreg_t(vgpu, PIPESRC(pipe)) & _PIPE_H_SRCSZ_MASK) >> in intel_vgpu_decode_primary_plane()