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Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL2 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dxusb-padctl.c184 #define XUSB_PADCTL_UPHY_PLL_P0_CTL2 0x364 macro
223 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
226 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
237 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
239 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
272 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
274 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
291 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
293 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
380 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
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/openbmc/linux/drivers/phy/tegra/
H A Dxusb-tegra210.c184 #define XUSB_PADCTL_UPHY_PLL_P0_CTL2 0x364 macro
486 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
491 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
504 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
506 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
546 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
548 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
565 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
567 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
652 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
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