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Searched refs:XUSB_PADCTL_IOPHY_PLL_P0_CTL2 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dxusb-padctl.c27 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044 macro
186 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_phy_enable()
190 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_phy_enable()
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra-xusb.c35 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044 macro
568 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_phy_power_on()
572 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_phy_power_on()
/openbmc/linux/drivers/phy/tegra/
H A Dxusb-tegra124.c59 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044 macro
1095 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in tegra124_pcie_phy_power_on()
1099 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in tegra124_pcie_phy_power_on()