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Searched refs:XCHAL_DATARAM1_VADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h246 #define XCHAL_DATARAM1_VADDR 0x3FF80000 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h239 #define XCHAL_DATARAM1_VADDR 0x5FFD8000 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h330 #define XCHAL_DATARAM1_VADDR 0x3FFC0000 /* virtual address */ macro