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Searched refs:VISLANDS30_IV_SRCID_D1_V_UPDATE_INT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/ivsrcid/
H A Divsrcid_vislands30.h30 #define VISLANDS30_IV_SRCID_D1_V_UPDATE_INT 7 // 0x07 macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dce60/
H A Dirq_service_dce60.c306 case VISLANDS30_IV_SRCID_D1_V_UPDATE_INT: in to_dal_irq_source_dce60()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dce110/
H A Dirq_service_dce110.c344 case VISLANDS30_IV_SRCID_D1_V_UPDATE_INT: in to_dal_irq_source_dce110()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c3659 for (i = VISLANDS30_IV_SRCID_D1_V_UPDATE_INT; i <= VISLANDS30_IV_SRCID_D6_V_UPDATE_INT; i += 2) { in dce110_register_irq_handlers()