| /openbmc/linux/Documentation/hwmon/ |
| H A D | lochnagar.rst | 33 in1_input Measured voltage for 1V8 DSP (milliVolts)
34 in1_label "1V8 DSP"
35 curr2_input Measured current for 1V8 DSP (milliAmps)
36 curr2_label "1V8 DSP"
37 power2_average Measured average power for 1V8 DSP (microWatts)
39 power2_label "1V8 DSP"
40 in2_input Measured voltage for 1V8 CDC (milliVolts)
41 in2_label "1V8 CDC"
42 curr3_input Measured current for 1V8 CDC (milliAmps)
43 curr3_label "1V8 CDC"
[all …]
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/ |
| H A D | 0001-hwaccess-use-__asm__-as-is-done-elsewhere.patch | 42 …/* On SPARC V8 there is no RMO just PSO and that does not apply to I/O accesses... but if V8 code …
44 * operation in the V8 instruction set anyway. If you know better then please tell us. */
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| /openbmc/linux/drivers/regulator/ |
| H A D | pcap-regulator.c | 118 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
227 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
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| /openbmc/linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm2835-rpi-cm1.dtsi | 30 regulator-name = "1V8";
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| H A D | bcm2837-rpi-cm3.dtsi | 22 regulator-name = "1V8";
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/nodejs/ |
| H A D | nodejs_22.13.1.bb | 1 DESCRIPTION = "nodeJS Evented I/O for V8 JavaScript"
97 # V8's JIT infrastructure requires binaries such as mksnapshot and
106 """Creates a small wrapper that invokes QEMU to run some target V8 binaries
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| /openbmc/linux/include/linux/mfd/ |
| H A D | ezx-pcap.h | 120 #define V8 7 macro
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| /openbmc/u-boot/doc/device-tree-bindings/phy/ |
| H A D | phy-stm32-usbphyc.txt | 44 - vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
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| /openbmc/u-boot/arch/arm/mach-uniphier/ |
| H A D | Kconfig | 26 bool "UniPhier V8 SoCs"
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| /openbmc/linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-nas4220b.dts | 110 pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV";
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| H A D | gemini-sq201.dts | 185 pins = "V8 GMAC0 RXDV";
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| H A D | gemini-sl93512r.dts | 222 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
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| H A D | gemini-dlink-dns-313.dts | 260 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am335x-boneblue.dts | 196 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */
481 "MMC1_DAT5", /* V8 */
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| /openbmc/linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a73a4-ape6evm.dts | 58 regulator-name = "1V8";
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-kontron-sl.dtsi | 147 regulator-name = "+1V8 (BUCK5)";
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| H A D | imx8mq-mnt-reform2.dts | 71 regulator-name = "1V8";
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| H A D | imx8mm-kontron-osm-s.dtsi | 153 regulator-name = "+1V8 (BUCK5)";
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| /openbmc/linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-gxl-s905x-libretech-cc-v2.dts | 153 regulator-name = "VCC 1V8";
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| H A D | meson-gxbb-odroidc2.dts | 279 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
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| /openbmc/linux/tools/perf/Documentation/ |
| H A D | perf-inject.txt | 79 if you are monitoring environment using JIT runtimes, such as Java, DART or V8.
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | zynqmp-zcu100-revC.dts | 273 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
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| H A D | meson-gxbb-odroidc2.dts | 191 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
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| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | hvx_histogram_row.S | 122 { v8.h = vshuff(V8.h)
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| /openbmc/linux/Documentation/arch/arm64/ |
| H A D | sve.rst | 523 Z8 | : * V8 |
556 This follows from the way these bits are mapped to V8..V15, which are caller-
580 * V8 | |
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